Developer Reference

  • 2020
  • 10/21/2020
  • Public Content
Contents

YUV422v210ToRGB, YUV422v210ToBGR

Converts a YUV422 (v210) image to a RGB/BGR image for ITU-R BT.709 HDTV signal.

Syntax

IppStatus ippiYUV422v210ToRGB_709HDTV_32u16u_C3(const Ipp32u*
pSrc
, int
srcStep
, Ipp16u*
pDst
, int
dstStep
, IppiSize
roiSize
);
IppStatus ippiYUV422v210ToBGR_709HDTV_32u16u_C3(const Ipp32u*
pSrc
, int
srcStep
, Ipp16u*
pDst
, int
dstStep
, IppiSize
roiSize
);
Include Files
ippcc.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
,
ippi.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
,
ippi.lib
Parameters
pSrc
Pointer to the source image ROI.
srcStep
Distance, in bytes, between starts of consecutive lines in the source image.
pDst
Pointer to the destination image ROI.
dstStep
Distance, in bytes, between starts of consecutive lines in the destination image.
roiSize
Size of the source and destination ROI in pixels.
Description
This function operates with ROI (see Regions of Interest in Intel IPP).
This function converts the YUV image
pSrc
, packed in the 4:2:2 sampling format, to the gamma-corrected RGB/BGR image
pDst
for digital component video signals in compliance with the ITU-R BT.709 Recommendation [ITU709] for high-definition TV (HDTV). The source YUV image has the following sequence of bytes: UYV|YUY|VYU|YVY, ... . The conversion is performed according to the following formulas:
R = Y + 1.540*(V - 512)
G = Y - 0.459*(V - 512) - 0.183*(U - 512)
B = Y + 1.816*(U - 512)
The output RGB/BGR values are saturated to the range R [0..31], G [0..63], B [0..31].
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error or a warning.
ippStsNullPtrErr
Indicates an error condition if
pSrc
or
pDst
is
NULL
.
ippStsSizeErr
Indicates an error condition if
roiSize
has a field with a zero or negative value.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804