Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

CbYCr422ToYCrCb420

Converts 4:2:2 CbYCr image to 4:2:0 YCrCb image.

Syntax

IppStatus ippiCbYCr422ToYCrCb420_8u_C2P3R(const Ipp8u*
pSrc
, int
srcStep
, Ipp8u*
pDst
[3], int
dstStep
[3], IppiSize
roiSize
);
Include Files
ippcc.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
,
ippi.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
,
ippi.lib
Parameters
pSrc
Pointer to the source image ROI.
srcStep
Distance in bytes between starts of consecutive lines in the source image.
pDst
Array of pointers to the ROI in each plane of the destination image.
dstStep
Array of distances in bytes between starts of consecutive lines in the destination image planes.
roiSize
Size of the source and destination ROI in pixels, height and width should be multiple of 2.
Description
This function operates with ROI (see Regions of Interest in Intel IPP).
This function converts the
4:2:2
CbYCr
two-channel image
pSrc
to the
4:2:0
YCrCb
three-plane image
pDst
. The source image has the following sequence of samples:
Cb0
,
Y0
,
Cr0
,
Y1
,
Cb1
,
Y2
,
Cr1
,
Y3
,
Cb2
, ... . The destination image has the following order of pointers:
Y
-plane,
Cr
-plane,
Cb
-plane (see Table
“Pixel-Order Image Formats”
and Table
“Planar Image Formats”
).
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error.
ippStsNullPtrErr
Indicates an error condition if any of the specified pointers is
NULL
.
ippStsSizeErr
Indicates an error condition if any field of the
roiSize
is less than 2.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804