Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

ResizeYUV420GetSrcOffset

Computes the offset of the source image for the NV12 resize transform by tile processing.

Syntax

IppStatus ippiResizeYUV420GetSrcOffset(
const IppiResizeYUV420Spec*
pSpec
, IppiPoint
dstOffset
, IppiPoint*
srcOffset
);
Include Files
ippi.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
Parameters
pSpec
Pointer to the spec structure for the resize filter.
dstOffset
Offset of the tiled destination image with respect to the destination image origin.
srcOffset
Offset of the source image.
Description
This function computes the offset of the processed source image ROI using the offset of the processed destination image ROI for the corresponding resize transform by tile processing. The
pSpec
parameter defines the resize algorithm parameters. Prior to using the
ippiResizeGetSrcOffset
function, you need to initialize the
pSpec
parameter by calling one of the following functions:
ippiResizeYUV420LanczosInit
and
ippiResizeYUV420SuperInit
.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error if one of the specified pointers is
NULL
.
ippStsContextMatchErr
Indicates an error if pointer to the spec structure is invalid.
ippStsOutOfRangeErr
Indicates an error if the destination image offset point is outside the destination image origin.
ippStsMisalignedOffsetErr
Indicates an error if one of the fields of the
dstOffset
parameter is odd.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804