Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

ResizeYUV420SuperInit

Initializes the spec structure for the NV12 resize transform by interpolation with the super sampling algorithm.

Syntax

IppStatus ippiResizeYUV420SuperInit(IppiSize
srcSize
, IppiSize
dstSize
, IppiResizeYUV420Spec*
pSpec
);
Include Files
ippi.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
Parameters
srcSize
Size in pixels of the source image.
dstSize
Size in pixels of the destination image.
pSpec
Pointer to the spec structure for the resize filter.
Description
This function initializes the
IppiResizeYUV420Spec
structure for the resize algorithm using interpolation with the super sampling algorithm.
To calculate the size of the spec structure object, call the
ippiResizeYUV420GetSize
function.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error if one of the specified pointers is
NULL
.
ippStsResizeNoOperation
Indicates an error if width or height of the image is equal to zero.
ippStsSizeWrn
Indicates a warning if width or height of the image is odd.
ippStsSizeErr
Indicates an error in the following cases:
  • if width or height of the image is equal to 1,
  • if one of the specified dimensions of the source image is less than the corresponding dimension of the destination image,
  • if width or height of the source or destination image is negative.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804