Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

DCTFwdGetSize, DCTInvGetSize

Compute the size of the DCT context structure and the size of the required work buffers.

Syntax

IppStatus ippiDCTFwdGetSize_32f (IppiSize
roiSize
, int*
pSizeSpec
, int*
pSizeInit
, int*
pSizeBuf
);
IppStatus ippiDCTInvGetSize_32f (IppiSize
roiSize
, int*
pSizeSpec
, int*
pSizeInit
, int*
pSizeBuf
);
Include Files
ippi.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
Parameters
roiSize
Size of the source and destination ROI, in pixels.
pSizeSpec
Pointer to the size of the DCT context structure.
pSizeInit
Pointer to the size of the buffer for the DCT initialization function.
pSizeBuf
Pointer to the size of the DCT external work buffer.
Description
These functions compute the following:
  1. Size of the DCT context structure. The result, in bytes, is stored in the
    pSizeSpec
    parameter.
  2. Size of the work buffer for the
    ippiDCTFwdInit
    and
    ippiDCTInvInit
    functions. The result, in bytes, is stored in the
    pSizeInit
    parameter.
  3. Size of the work buffer for the
    ippiDCTFwd
    and
    ippiDCTInv
    functions. The result, in bytes, is stored in the
    pSizeBuf
    parameter.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when one of the specified pointers is
NULL
.
ippStsSizeErr
Indicates an error when
roiSize
has a field with a zero or negative value.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804