Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

FFTGetSize

Computes the size of the FFT context structure and the size of the work buffer.

Syntax

IppStatus ippiFFTGetSize_R_32f (int
orderX
, int
orderY
, int
flag
, IppHintAlgorithm
hint
, int*
pSizeSpec
, int*
pSizeInit
, int*
pSizeBuf
);
IppStatus ippiFFTGetSize_C_32fc (int
orderX
, int
orderY
, int
flag
, IppHintAlgorithm
hint
, int*
pSizeSpec
, int*
pSizeInit
, int*
pSizeBuf
);
Include Files
ippi.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
Parameters
orderX, orderY
Order of the FFT in x- and y- directions, respectively.
flag
Flag to choose the option for results normalization.
hint
This parameter is deprecated. Set the value to
ippAlgHintNone
.
pSizeSpec
Pointer to the size of the FFT context structure.
pSizeInit
Pointer to the size of the buffer for the FFT initialization function.
pSizeBuf
Pointer to the size of the FFT external work buffer.
Description
This function computes the following:
  • Size of the FFT context structure. The result in bytes is stored in the
    pSpecSize
    parameter.
  • Size of the work buffer for the
    ippiFFTInit
    functions. The result in bytes is stored in the
    pSizeInit
    parameter.
  • Size of the work buffer for the
    ippiFFTFwd
    and
    ippiFFTInv
    functions. The result in bytes is stored in the
    pSizeBuf
    parameter.
The suffix after the function name indicates the flavors of the FFT functions:
ippiFFTGetSize_C
is for complex flavors and
ippiFFTGetSize_R
is for real flavors.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when one of the specified pointers is
NULL
.
ippStsFftOrderErr
Indicates an error condition when the FFT order value is illegal.
ippStsFFTFlagErr
Indicates an error condition when the
flag
value is illegal.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804