Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

PolarToCart

Converts an image in the polar coordinate form to Cartesian coordinate form.

Syntax

IppStatus ippiPolarToCart_<mod>(const Ipp32f*
pSrcMagn
, const Ipp32f*
pSrcPhase
, int
srcStep
, IppiSize
roiSize
, Ipp32fc*
pDst
, int
dstStep
);
Supported values for
mod
:
32fc_C1R
32fc_C3R
Include Files
ippi.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
Parameters
pSrcMagn
Pointer to the buffer containing magnitudes of the source image.
pSrcPhase
Pointer to the buffer containing phase values of the source image.
srcStep
Distance in bytes between starts of consecutive lines in the source buffers.
roiSize
Size of the source and destination image ROI.
pDst
Pointer to the destination image ROI.
dstStep
Distance in bytes between starts of consecutive lines in the destination image buffer.
Description
This function operates with ROI (see Regions of Interest in Intel IPP).
This function converts the polar coordinate of the source image stored in the arrays of magnitudes
pSrcMagn
and phase values
pSrcPhase
to the destination image
pDst
in complex-data format (in Cartesian coordinate form).
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error or a warning.
ippStsNullPtrErr
Indicates an error condition if one of the specified pointers is
NULL
.
ippStsStepErr
Indicates an error condition if
srcStep
or
dstStep
value is zero or negative.
ippStsSizeErr
Indicates an error condition if
srcSize
has a field with value less than 1.

Example

The code example below shows how to use the function
ippiPolarToCart_32fc_C1R
.
void func_polartocart()
{
Ipp32f pSrcMagn[2*2] = {1.0, 0.0, 2.1, 3.2};
Ipp32f pSrcPhase[2*2] = {0.0, 2.0, 1.6,-1.0};
Ipp32fc pDst[2*2] = {0};
int srcStep = 2*sizeof(Ipp32f);
int dstStep = 2*sizeof(Ipp32fc);
IppiSize roiSize = {2, 2};
 
ippiPolarToCart_32fc_C1R(pSrcMagn, pSrcPhase, srcStep, roiSize, pDst, dstStep);
}
 
Result: pDst - > (1.0, 0.0) (0.0, 0.0) (-0.1, 2.1) (1.7, -2.7)
 

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804