API Quick Reference Guide

  • 2020
  • 09/30/2019
  • Public Content
Contents

iwiSwapChannels

Syntax

typedef struct _IwiSwapChannelsParams { IwiChDescriptor chDesc; } IwiSwapChannelsParams;
static IW_INLINE void iwiSwapChannels_SetDefaultParams( IwiSwapChannelsParams *pParams )
IW_DECL(IppStatus) iwiSwapChannels( const IwiImage *pSrcImage, IwiImage *pDstImage, const int *pDstOrder, double value, const IwiSwapChannelsParams *pAuxParams, const IwiTile *pTile );
Parameters
pSrcImage
Pointer to the source image.
pDstImage
Pointer to the destination image.
pDstOrder
Pointer to the destination image channel order:
dst[channel]
=
src[dstOrder[channel]]
.
value
Value to set destination channels to if the number of destination channels is greater than the number of source channels.
pAuxParams
Pointer to the auxiliary parameters structure. If
NULL
, default parameters are used.
pTile
Pointer to the
IwiTile
structure for tiling. If
NULL
, the whole image is processed.
Auxiliary Arguments
Argument
Default Value
Description
IwiChDescriptor
iwiChDesc_None
Special channels processing mode.
Description
This function swaps image channels, putting them in the order specified in
pDstOrder
. One source channel can be mapped to several destination channels.
If the number of destination channels is greater than the number of source channels then:
  • If
    dstOrder[channel]
    ==
    srcChannels
    ,
    dst[channel]
    =
    constValue
    .
  • If
    dstOrder[channel]
    >
    srcChannels
    ,
    dst[channel]
    is unchanged.
This function supports the following features:
Feature
Support
Internal threading
No
Manual tiling
Yes
IwiTile
simple tiling
Yes
IwiTile
pipeline tiling
Yes
Return Values
ippStsChannelOrderErr
The destination order is out of the range.
ippStsDataTypeErr
The
dataType
value is illegal.
ippStsNumChannelsErr
The
channels
value is illegal.
ippStsSizeErr
Values of the
size
fields are illegal.
ippStsNullPtrErr
At least one of the pointers (except
pTile
) is
NULL
.
ippStsNoErr
No errors.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804