API Quick Reference Guide

  • 2020
  • 09/30/2019
  • Public Content
Contents

iwiMirror

Syntax
typedef struct _IwiMirrorParams { IwiChDescriptor chDesc; } IwiMirrorParams;
static IW_INLINE void iwiMirror_SetDefaultParams( IwiMirrorParams *pParams )
IW_DECL(IppStatus) iwiMirror( const IwiImage *pSrcImage, IwiImage *pDstImage, IppiAxis axis, const IwiMirrorParams *pAuxParams, const IwiTile *pTile );
Parameters
pSrcImage
Pointer to the source image.
pDstImage
Pointer to the destination image.
axis
Mirror axis.
pAuxParams
Pointer to the auxiliary parameters structure. If
NULL
, default parameters are used.
pTile
Pointer to the
IwiTile
structure for tiling. If
NULL
, the whole image is processed.
Auxiliary Arguments
Argument
Default Value
Description
chDesc
iwiChDesc_None
Special channels processing mode.
Description
This function mirrors an image over the specified axis.
For
ippAxs45
and
ippAxs135
axis
values, the destination image must have a flipped size:
dstWidth
=
srcHeight
,
dstHeight
=
srcWidth
.
This function supports the following features:
Feature
Support
Internal threading
No
Manual tiling
Yes
IwiTile
simple tiling
Yes
IwiTile
pipeline tiling
No
Return Values
ippStsDataTypeErr
The
dataType
value is illegal.
ippStsNumChannelsErr
The
channels
value is illegal.
ippStsNotSupportedModeErr
The selected combination of parameters' values is not supported.
ippStsInplaceModeNotSupportedErr
In-place operation is not supported in tiling mode:
pSrcImage
is equal to
pDstImage
.
ippStsNullPtrErr
At least one of the pointers is
NULL
.
ippStsNoErr
No errors.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804