API Quick Reference Guide

  • 2020
  • 09/30/2019
  • Public Content
Contents

iwiWarpAffine_Process

Syntax

IW_DECL(IppStatus) iwiWarpAffine_Process( const IwiWarpAffineSpec *pSpec, const IwiImage *pSrcImage, IwiImage *pDstImage, const IwiTile *pTile );
Parameters
pSpec
Pointer to the internal specification structure.
pSrcImage
Pointer to the source image.
pDstImage
Pointer to the destination image.
pTile
Pointer to the
IwiTile
structure for tiling. If
NULL
, the whole image is processed.
Description
This function applies the warp affine transform to the source image ROI. The function requires initialization before usage.
This function supports the following features:
Feature
Support
Internal threading
No
Manual tiling
No
IwiTile
simple tiling
Yes
IwiTile
pipeline tiling
No
Return Values
ippStsNoErr
No errors.
ippStsInterpolationErr
The
interpolation
value is illegal.
ippStsDataTypeErr
The
dataType
value is illegal.
ippStsBorderErr
The
border
value is illegal.
ippStsNumChannelsErr
The
channels
value is illegal.
ippStsNotEvenStepErr
The
srcStep
and/or
dstStep
value is not divisible by size of elements.
ippStsNotSupportedModeErr
Specified combination of parameters' values is not supported.
ippStsNoMemErr
Failed to allocate memory.
ippStsNullPtrErr
The
pSpec
pointer is
NULL
.
ippStsNoOperation
Warning: width and/or height of the image is equal to zero.
ippStsSizeErr
Values of the
srcSize
and/or
dstSize
fields are illegal.
ippStsWrongIntersectQuad
Warning: transformed source image has no intersection with the destination image.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804