• 2018 Update 1
  • 11/10/2017
  • Public Content
  • Download as PDF

Load Balance
tab displays the same data as the Flat Profile except that it groups the data by function and not by process. The
Load Balance
tab compares the profiles of the same function across several processes. The top level entries of the tree given in the first column are functions.
In this figure showing the load balance for MPI_Allreduce, you can see that TSelf for MPI_Allreduce is pretty unbalanced across processes:
Intel® Trace Analyzer
Do This:
To Do This:
Right-click on
Group MPI
and select
Ungroup MPI
from the context menu
See the distribution of execution time over the individual MPI routines.
Right-click on the child of
Group MPI
and select
Regroup MPI
from the context menu.
Or go to Function Aggregation (
Advanced > Function Aggregation
, or the toolbar button) and select Major Function Groups
Regroup the children of MPI
Select the
Children of Group All_Processes
entry from the combo box at the top of the tab.
View the data for the children of each process.
Press the arrows at the side of each process in the
Children of Group All_Processes
Expand and collapse the processes of interest
Right-click on a process and select
Command line for VTune Amplifier/Advisor...
Open the
Command line for Intel® VTune™ Amplifier/Intel® Advisor
dialog box for selected process
Switch between the list and pie charts by pressing the button in the top right corner of the tab
Analyze the overall load balance pattern (for
). For example, see the
Pie Charts in the Load Balance Tab
However, there may be a huge number of processes in a relatively confined space.
Use two spin buttons above the pie charts
Control the minimum radius of the pies (left button) and how many pie charts appear in a row (right button)
Pie Charts in the Load Balance Tab
Intel® Trace Analyzer
See Also

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804