• 2018 Update 1
  • 11/10/2017
  • Public Content
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The advanced aggregation function is based on process aggregation and allows lightening the Event Timeline chart for big traces above 1K processes. By default, the function is automatically enabled for traces with above 768 processes, but you can change this threshold using the Edit Configuration Dialog Box.
Advanced Aggregation Settings in the Edit Configuration Dialog:
Intel® Trace Analyzer
When you enable this function, all processes are divided into a set of serial groups. Each group has certain count of processes (except for the last one) and corresponds to a single vertical frame on the
Event Timeline
chart. The default frame size is 512 displayed processes. You can change this value in the Edit Configuration Dialog Box. These processes groups are called
  1. N1
    is the start of displayed range of processes in the group
  2. N2
    is the end of the range
For example, the first advanced aggregation group is called
by default
The advanced aggregation groups contain hidden (non-visible separately) processes as two additionally aggregated groups:
  1. aggregated_above
  2. aggregated_below
They are displayed on the top and on the bottom of a frame respectively.
Bottom of the First Advanced Aggregation Frame:
Intel® Trace Analyzer
Top of the Next Advanced Aggregation Frame:
Intel® Trace Analyzer
A vertical scrollbar of
Event Timeline
chart enables you to scroll among all advanced aggregation frames.
When a jump to the next frame happens, Intel Trace Analyzer loads the corresponding process group. The chart may be not available in a short period.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804