Analyzing the Performance of an OpenMP* and MPI Application

Use Intel® Parallel Studio XE Cluster Edition to understand the cause of ineffective code in a hybrid application by performing a series of steps in a workflow. This tutorial guides you through these workflow steps while using a sample OpenMP* and MPI application,
, which simulates electrophysiological heart activity.
  • Build the
    sample application.
  • Test OpenMP thread and MPI process combinations.
  • Run Application Performance Snapshot.
  • Interpret result data.
  • Set up the Intel Trace Analyzer and Collector environment.
  • Run the application with Intel Trace Analyzer and Collector enabled.
  • Review the message profile chart.
  • Update the application code for MPI communication issues.
  • Run Application Performance Snapshot on updated application.
  • Test application performance.
  • Use
    to run
    Intel VTune
    HPC Performance Characterization analysis from a command prompt.
  • Review the analysis data to identify legacy instruction set usage.
  • Fix vector instruction set.
  • Test application performance.
  • Run the HPC Performance Characterization analysis on the application.
  • Identify functions that would benefit from parallelism at the threading level.
  • Update the application code to use parallelized functions.
  • Test application performance.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804