• 2019 Update 3
  • 03/07/2019
  • Public Content
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Intel® Trace Collector enables you to define an arbitrary, recursive group structure over the processes of an MPI application, and Intel® Trace Analyzer can display profiling and communication statistics for these groups. Thus, you can start with the top-level groups and walk down the hierarchy, unfolding interesting groups into ever more detail until you arrive at the level of processes or threads.
Groups are defined recursively with a simple bottom-up scheme: the
VT_groupdef()
function builds a new group from a list of already defined groups of processes, returning an integer group handle to identify the newly defined group. The following handles are predefined:
enum VT_Group
Enumerator
Description
VT_ME
The calling thread or process
VT_GROUP_THREAD
Group of all threads
VT_GROUP_PROCESS
Group of all processes
VT_GROUP_CLUSTER
Group of all clusters
To refer to non-local processes, the lookup function
VT_getprocid()
translates between ranks in
MPI_COMM_WORLD
and handles that can be used for
VT_groupdef()
.
VT_getprocid
int VT_getprocid(int procindex, int * procid)
Description
Get global ID for process which is identified by process index.
If threads are supported, then this ID refers to the group of all threads within the process, otherwise the result is identical to
VT_getthreadid(procindex, 0, procid)
.
Fortran
VTGETPROCID(procindex, procid, ierr)
Parameters
procindex
index of process (0 <=
procindex
< N )
Return values
procidpointer
pointer to the memory location where the ID is written
Returns error code
The same works for threads.
VT_getthreadid
int VT_getthreadid(int procindex, int thindex, int _ threadid)
Description
Get global id for the thread which is identified by the pair of process and thread index.
Fortran
VTGETTHREADID(procindex, thindex, threadid, ierr)
Parameters
procindex
index of process (0 <=
procindex
< N )
thindex
index of thread
Return values
threadid
pointer to the memory location where the ID is written
Returns error code
VT_groupdef
int VT_groupdef(const char * name, int n_members, int * ids, int * grouphandle)
Description
Defines a new group and returns a handle for it.
Groups are distinguished by their name and their members. The order of group members is preserved, which can lead to groups with the same name and same set of members, but different order of these members.
Fortran
VTGROUPDEF(name, n_members, ids[], grouphandle, ierr)
Parameters
name
the name of the group
n_members
number of entries in the ids array
ids
array where each entry can be either a
VT_Group
value, or result of
VT_getthreadid()
,
VT_getprocid()
or
VT_groupdef()
Return values
grouphandle
handle for the new group, or old handle if the group has already been defined
Returns error code
To generate a new group that includes the processes with even ranks in
MPI_COMM_WORLD
, you can use the code:
int *IDS = malloc(sizeof(*IDS)*(number_procs/2)); int i, even_group; for( i = 0; i < number_procs; i += 2 ) VT_getprocid(i, IDS + i/2); VT_groupdef("Even Group", number_procs/2, IDS, &even_group);
If threads are used, then they automatically become part of a group that is formed by all threads inside the same process. The numbering of threads inside this group depends on the order in which threads call the Intel® Trace Collector library because they are registered the first time they invoke the Intel Trace Collector library. The order can be controlled by calling
VT_registerthread()
as the first API function with a positive parameter.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804