Developer Reference

Contents

?gsum2d

Performs element-wise summation.

Syntax

call igsum2d
(
icontxt
,
scope
,
top
,
m
,
n
,
a
,
lda
,
rdest
,
cdest
)
call sgsum2d
(
icontxt
,
scope
,
top
,
m
,
n
,
a
,
lda
,
rdest
,
cdest
)
call dgsum2d
(
icontxt
,
scope
,
top
,
m
,
n
,
a
,
lda
,
rdest
,
cdest
)
call cgsum2d
(
icontxt
,
scope
,
top
,
m
,
n
,
a
,
lda
,
rdest
,
cdest
)
call zgsum2d
(
icontxt
,
scope
,
top
,
m
,
n
,
a
,
lda
,
rdest
,
cdest
)
Input Parameters
icontxt
INTEGER
. Integer handle that indicates the context.
scope
CHARACTER*1
. Indicates what scope the combine should proceed on. Limited to
ROW
,
COLUMN
, or
ALL
.
top
CHARACTER*1
. Communication pattern to use during the combine operation.
m
INTEGER
. The number of matrix rows to be combined.
n
INTEGER
. The number of matrix columns to be combined.
a
TYPE
array
(
lda
,
n
)
. Matrix to be added to produce the sum.
lda
INTEGER
. The leading dimension of the matrix
A
, that is, the distance between two successive elements in a matrix row.
rdest
INTEGER
.
The process row coordinate of the process that should receive the result. If
rdest
or
cdest
= -1, all processes within the indicated scope receive the answer.
cdest
INTEGER
.
The process column coordinate of the process that should receive the result. If
rdest
or
cdest
= -1, all processes within the indicated scope receive the answer.
Output Parameters
a
TYPE
array
(
lda
,
n
)
. Contains the result if this process is selected to receive the answer, or intermediate results if the process is not selected to receive the result.
Description
This routine performs element-wise summation, that is, each element of matrix
A
is summed with the corresponding element of the other process's matrices. Combines may be globally-blocking, so they must be programmed as if no process returns until all have called the routine.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804