Developer Reference

Contents

cblas_?rotmg

Computes the parameters for a modified Givens rotation.

Syntax

void
cblas_srotmg
(
float
*d1
,
float
*d2
,
float
*x1
,
const
float
y1
,
float
*param
);
void
cblas_drotmg
(
double
*d1
,
double
*d2
,
double
*x1
,
const
double
y1
,
double
*param
);
Include Files
  • mkl.h
Description
Given Cartesian coordinates (
x1
,
y1
) of an input vector,
these
routines compute the components of a modified Givens transformation matrix
H
that zeros the
y
-component
of the resulting vector:
Input Parameters
d1
Provides the scaling factor for the
x
-coordinate of the input vector.
d2
Provides the scaling factor for the
y
-coordinate of the input vector.
x1
Provides the
x
-coordinate of the input vector.
y1
Provides the
y
-coordinate of the input vector.
Output Parameters
d1
Provides the first diagonal element of the updated matrix.
d2
Provides the second diagonal element of the updated matrix.
x1
Provides the
x
-coordinate of the rotated vector before scaling.
param
Array, size 5.
The elements of the
param
array are:
param
[0]
contains a switch,
flag
. the other array elements
param
[1-4]
contain the components of the array
H
:
h
11
,
h
21
,
h
12
, and
h
22
, respectively.
Depending on the values of
flag
, the components of
H
are set as follows:
flag
=
-1.0
:
flag
=
0.0
:
flag
=
1.0
:
flag
=
-2.0
:
In the last three cases, the matrix entries of 1.0, -1.0, and 0.0 are assumed based on the value of
flag
and are not required to be set in the
param
vector.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804