Contents

# mkl_?csrmm

Computes matrix - matrix product of a sparse matrix stored in the CSR format (deprecated).

## Syntax

Include Files
• mkl.h
Description
This routine is deprecated. Use Use mkl_sparse_?_mmfrom the
Intel® MKL
The
mkl_?csrmm
routine performs a matrix-matrix operation defined as
`C := alpha*A*B + beta*C`
or
`C := alpha*AT*B + beta*C`
or
`C := alpha*AH*B + beta*C,`
where:
alpha
and
beta
are scalars,
B
and
C
are dense matrices,
A
is an
m
-by-
k
sparse matrix in compressed sparse row (CSR) format,
A
T
is the transpose of
A
, and
A
H
is the conjugate transpose of
A
.
This routine supports a CSR format both with one-based indexing and zero-based indexing.
Input Parameters
transa
Specifies the operation.
If
transa
=
'N'
or
'n'
, then
C
:=
alpha
*
A
*
B
+
beta
*
C
,
If
transa
=
'T'
or
't'
, then
C
:=
alpha
*
A
T
*
B
+
beta
*
C
,
If
transa
=
'C'
or
'c'
, then
C
:=
alpha
*
A
H
*
B
+
beta
*
C
.
m
Number of rows of the matrix
A
.
n
Number of columns of the matrix
C
.
k
Number of columns of the matrix
A
.
alpha
Specifies the scalar
alpha
.
matdescra
Array of six elements, specifies properties of the matrix used for operation. Only first four array elements are used, their possible values are given in
Table “Possible Values of the Parameter
matdescra
(
descra
)”
. Possible combinations of element values of this parameter are given in
Table “Possible Combinations of Element Values of the Parameter
matdescra
.
val
Array containing non-zero elements of the matrix
A
.
For zero-based indexing its length is
pntre
[
m
—1] -
pntrb
[0]
.
Refer to
values
array description in CSR Format for more details.
indx
For one-based indexing, array containing the column indices plus one for each non-zero element of the matrix
A
.
For zero-based indexing, array containing the column indices for each non-zero element of the matrix
A
.
Its length is equal to length of the
val
array.
Refer to
columns
array description in CSR Format for more details.
pntrb
Array of length
m
.
This array contains row indices, such that
pntrb
[
I
] -
pntrb
[0]
is the first index of row
I
in the arrays
val
and
indx
.
Refer to
pointerb
array description in CSR Format for more details.
pntre
Array of length
m
.
This array contains row indices, such that
pntre
[
I
] -
pntrb
[0] - 1
is the last index of row
I
in the arrays
val
and
indx
.
Refer to
pointerE
array description in CSR Format for more details.
b
Array, size
ldb
by at least
n
for non-transposed matrix
A
and at least
m
for transposed for one-based indexing, and (at least
k
for non-transposed matrix
A
and at least
m
for transposed,
ldb
) for zero-based indexing.
On entry with
transa=
'N'
or
'n'
k
-by-
n
part of the array
b
must contain the matrix
B
m
-by-
n
part of the array
b
must contain the matrix
B
.
ldb
b
for one-based indexing, and the second dimension of
b
for zero-based indexing, as declared in the calling (sub)program.
beta
Specifies the scalar
beta
.
c
Array, size
ldc
by
n
for one-based indexing, and
(
m
,
ldc
)
for zero-based indexing.
m
-by-
n
part of the array
c
must contain the matrix
C
k
-by-
n
part of the array
c
must contain the matrix
C
.
ldc
c
for one-based indexing, and the second dimension of
c
for zero-based indexing, as declared in the calling (sub)program.
Output Parameters
c
Overwritten by the matrix
(
alpha
*
A
*
B
+
beta
*
C
)
,
(
alpha
*
A
T
*
B
+
beta
*
C
)
, or
(
alpha
*
A
H
*
B
+
beta
*
C
)
.

#### Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804