Developer Reference

Contents

?heswapr

Applies an elementary permutation on the rows and columns of a Hermitian matrix.

Syntax

lapack_int
LAPACKE_cheswapr
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
lapack_complex_float
*
a
,
lapack_int
i1
,
lapack_int
i2
);
lapack_int
LAPACKE_zheswapr
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
lapack_complex_double
*
a
,
lapack_int
i1
,
lapack_int
i2
);
Include Files
  • mkl.h
Description
The routine applies an elementary permutation on the rows and columns of a Hermitian matrix.
Input Parameters
A
<datatype>
placeholder, if present, is used for the C interface data types in the C interface section above. See C Interface Conventions for the C interface principal conventions and type definitions.
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
uplo
Must be
'U'
or
'L'
.
Indicates how the input matrix
A
has been factored:
If
uplo
=
'U'
, the array
a
stores the upper triangular factor
U
of the factorization
A
=
U*D*U
H
.
If
uplo
=
'L'
, the array
a
stores the lower triangular factor
L
of the factorization
A
=
L*D*L
H
.
n
The order of matrix
A
;
n
0.
nrhs
The number of right-hand sides;
nrhs
0.
a
Array of size
at least
max(1,
lda
*
n
)
.
The array
a
contains the block diagonal matrix
D
and the multipliers used to obtain the factor
U
or
L
as computed by
?hetrf
.
i1
Index of the first row to swap.
i2
Index of the second row to swap.
Output Parameters
a
If
info
= 0
, the inverse of the original matrix.
If
info
=
'U'
, the upper triangular part of the inverse is formed and the part of
A
below the diagonal is not referenced.
If
info
=
'L'
, the lower triangular part of the inverse is formed and the part of
A
above the diagonal is not referenced.
Return Values
This function returns a value
info
.
If
info
= 0
, the execution is successful.
If
info
=
-i
, the
i
-th parameter had an illegal value.
If
info
= -1011
, memory allocation error occurred.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804