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Contents

?tpqrt2

Computes a QR factorization of a real or complex "triangular-pentagonal" matrix, which is composed of a triangular block and a pentagonal block, using the compact WY representation for Q.

Syntax

lapack_int
LAPACKE_stpqrt2
(
int
matrix_layout
,
lapack_int
m
,
lapack_int
n
,
lapack_int
l
,
float
*
a
,
lapack_int
lda
,
float
*
b
,
lapack_int
ldb
,
float
*
t
,
lapack_int
ldt
);
lapack_int
LAPACKE_dtpqrt2
(
int
matrix_layout
,
lapack_int
m
,
lapack_int
n
,
lapack_int
l
,
double
*
a
,
lapack_int
lda
,
double
*
b
,
lapack_int
ldb
,
double
*
t
,
lapack_int
ldt
);
lapack_int
LAPACKE_ctpqrt2
(
int
matrix_layout
,
lapack_int
m
,
lapack_int
n
,
lapack_int
l
,
lapack_complex_float
*
a
,
lapack_int
lda
,
lapack_complex_float
*
b
,
lapack_int
ldb
,
lapack_complex_float
*
t
,
lapack_int
ldt
);
lapack_int
LAPACKE_ztpqrt2
(
int
matrix_layout
,
lapack_int
m
,
lapack_int
n
,
lapack_int
l
,
lapack_complex_double
*
a
,
lapack_int
lda
,
lapack_complex_double
*
b
,
lapack_int
ldb
,
lapack_complex_double
*
t
,
lapack_int
ldt
);
Include Files
  • mkl.h
Description
The input matrix
C
is an (
n
+
m
)-by-
n
matrix
Equation
where
A
is an
n
-by-
n
upper triangular matrix, and
B
is an
m
-by-
n
pentagonal matrix consisting of an (
m
-
l
)-by-
n
rectangular matrix
B1
on top of an
l
-by-
n
upper trapezoidal matrix
B2
:
Equation
The upper trapezoidal matrix
B2
consists of the first
l
rows of an
n
-by-
n
upper triangular matrix, where 0 ≤
l
≤ min(
m
,
n
). If
l
=0,
B
is an
m
-by-
n
rectangular matrix. If
m
=
l
=
n
,
B
is upper triangular. The matrix
W
contains the elementary reflectors
H(i)
in the
i
th column below the diagonal (of
A
) in the (
n
+
m
)-by-
n
input matrix
C
so that
W
can be represented as
Equation
Thus,
V
contains all of the information needed for
W
, and is returned in array
b
.
V
has the same form as
B
:
Equation
The columns of
V
represent the vectors which define the
H(i)
s.
The (
m
+
n
)-by-(
m
+
n
) block reflector
H
is then given by
H
= I -
W
*
T
*
W
T
for real flavors, and
H
= I -
W
*
T
*
W
H
for complex flavors
where
W
T
is the transpose of
W
,
W
H
is the conjugate transpose of
W
, and
T
is the upper triangular factor of the block reflector.
Input Parameters
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
m
The total number of rows in the matrix
B
(
m
≥ 0).
n
The number of columns in
B
and the order of the triangular matrix
A
(
n
≥ 0).
l
The number of rows of the upper trapezoidal part of
B
(min(
m
,
n
) ≥
l
≥ 0).
a
,
b
Arrays:
a
, size
max(1,
lda
*
n
)
contains the
n
-by-
n
upper triangular matrix
A
.
b
, size
max(1,
ldb
*
n
) for column major and max(1,
ldb
*
m
) for row major
, the pentagonal
m
-by-
n
matrix
B
. The first (
m
-
l
) rows contain the rectangular
B1
matrix, and the next
l
rows contain the upper trapezoidal
B2
matrix.
lda
The leading dimension of
a
; at least max(1,
n
).
ldb
The leading dimension of
b
; at least max(1,
m
)
for column major and max(1,
n
) for row major
.
ldt
The leading dimension of
t
; at least max(1,
n
).
Output Parameters
a
The elements on and above the diagonal of the array contain the upper triangular matrix
R
.
b
The pentagonal matrix
V
.
t
Array, size
max(1,
ldt
*
n
)
.
The upper
n
-by-
n
upper triangular factor
T
of the block reflector.
Return Values
This function returns a value
info
.
If
info
= 0
, the execution is successful.
If
info
< 0 and
info
=
-i
, the
i
th argument had an illegal value.
If
info
= -1011
, memory allocation error occurred.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804