Developer Reference

Contents

?tpttr

Copies a triangular matrix from the standard packed format (TP) to the standard full format (TR) .

Syntax

lapack_int
LAPACKE_stpttr
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
const
float
*
ap
,
float
*
a
,
lapack_int
lda
);
lapack_int
LAPACKE_dtpttr
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
const
double
*
ap
,
double
*
a
,
lapack_int
lda
);
lapack_int
LAPACKE_ctpttr
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
const
lapack_complex_float
*
ap
,
lapack_complex_float
*
a
,
lapack_int
lda
);
lapack_int
LAPACKE_ztpttr
(
int
matrix_layout
,
char
uplo
,
lapack_int
n
,
const
lapack_complex_double
*
ap
,
lapack_complex_double
*
a
,
lapack_int
lda
);
Include Files
  • mkl.h
Description
The routine copies a triangular matrix
A
from the standard packed format to the standard full format.
Input Parameters
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
uplo
Specifies whether
A
is upper or lower triangular:
= 'U': A is upper triangular,
= 'L': A is lower triangular.
n
The order of the matrices
ap
and
a
.
n
0
.
ap
Array, size at least
max
(1,
n
*(
n
+1)/2). (see Matrix Storage Schemes).
lda
The leading dimension of the array
a.
lda
max
(1,
n
).
Output Parameters
a
Array, size
max(1,
lda
*
n
)
.
On exit, the triangular matrix
A
. If
uplo
= 'U', the leading
n
-by-
n
upper triangular part of the array
a
contains the upper triangular part of the matrix
A
, and the strictly lower triangular part of
a
is not referenced. If
uplo
= 'L', the leading
n
-by-
n
lower triangular part of the array
a
contains the lower triangular part of the matrix
A
, and the strictly upper triangular part of
a
is not referenced.
Return Values
This function returns a value
info
.
If
info
= 0
, the execution is successful.
If
info
=
-i
, the
i
-th parameter had an illegal value.
If
info
= -1011
, memory allocation error occurred.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804