Developer Reference

Contents

?unmhr

Multiplies an arbitrary complex matrix C by the complex unitary matrix Q determined by
?gehrd
.

Syntax

lapack_int
LAPACKE_cunmhr
(
int
matrix_layout
,
char
side
,
char
trans
,
lapack_int
m
,
lapack_int
n
,
lapack_int
ilo
,
lapack_int
ihi
,
const
lapack_complex_float
*
a
,
lapack_int
lda
,
const
lapack_complex_float
*
tau
,
lapack_complex_float
*
c
,
lapack_int
ldc
);
lapack_int
LAPACKE_zunmhr
(
int
matrix_layout
,
char
side
,
char
trans
,
lapack_int
m
,
lapack_int
n
,
lapack_int
ilo
,
lapack_int
ihi
,
const
lapack_complex_double
*
a
,
lapack_int
lda
,
const
lapack_complex_double
*
tau
,
lapack_complex_double
*
c
,
lapack_int
ldc
);
Include Files
  • mkl.h
Description
The routine multiplies a matrix
C
by the unitary matrix
Q
that has been determined by a preceding call to
cgehrd
/
zgehrd
. (The routine
?gehrd
reduces a real general matrix
A
to upper Hessenberg form
H
by an orthogonal similarity transformation,
A
=
Q*H*Q
H
, and represents the matrix
Q
as a product of
ihi
-
ilo
elementary reflectors. Here
ilo
and
ihi
are values determined by
cgebal
/
zgebal
when balancing the matrix; if the matrix has not been balanced,
ilo
= 1
and
ihi
=
n
.)
With
?unmhr
, you can form one of the matrix products
Q*C
,
Q
H
*C
,
C*Q
, or
C*Q
H
, overwriting the result on
C
(which may be any complex rectangular matrix). A common application of this routine is to transform a matrix
V
of eigenvectors of
H
to the matrix
QV
of eigenvectors of
A
.
Input Parameters
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
side
Must be
'L'
or
'R'
.
If
side
=
'L'
, then the routine forms
Q*C
or
Q
H
*C
.
If
side
=
'R'
, then the routine forms
C*Q
or
C*Q
H
.
trans
Must be
'N'
or
'C'
.
If
trans
=
'N'
, then
Q
is applied to
C
.
If
trans
=
'T'
, then
Q
H
is applied to
C
.
m
The number of rows in
C
(
m
0
).
n
The number of columns in
C
(
n
0
).
ilo
,
ihi
These must be the same parameters
ilo
and
ihi
, respectively, as supplied to
?gehrd
.
If
m
> 0
and
side
=
'L'
, then
1
ilo
ihi
m
.
If
m
= 0
and
side
=
'L'
, then
ilo
= 1
and
ihi
= 0
.
If
n
> 0
and
side
=
'R'
, then
1
ilo
ihi
n
.
If
n
= 0
and
side
=
'R'
, then
ilo
=1
and
ihi
= 0
.
a
,
tau
,
c
Arrays:
a
(size max(1,
lda
*
n
) for
side
='R' and size max(1,
lda
*
m
) for
side
='L')
contains details of the vectors which define the elementary reflectors, as returned by
?gehrd
.
tau
contains further details of the elementary reflectors, as returned by
?gehrd
.
The dimension of
tau
must be at least max (1,
m
-1)
if
side
=
'L'
and at least max (1,
n
-1) if
side
=
'R'
.
c
(size max(1,
ldc
*
n
) for column major layout and max(1,
ldc
*
m
for row major layout)
contains the
m
-by-
n
matrix
C
.
lda
The leading dimension of
a
; at least max(1,
m
) if
side
=
'L'
and at least max (1,
n
) if
side
=
'R'
.
ldc
The leading dimension of
c
; at least max(1,
m
)
for column major layout and at least max(1,
n
) for row major layout
.
Output Parameters
c
C
is overwritten by
Q*C
, or
Q
H
*
C,
or
C*Q
H
, or
C*Q
as specified by
side
and
trans
.
Return Values
This function returns a value
info
.
If
info
=0
, the execution is successful.
If
info
=
-i
, the
i
-th parameter had an illegal value.
Application Notes
The computed matrix
Q
differs from the exact result by a matrix
E
such that
||
E
||
2
=
O
(
ε
)*||
C
||
2
, where
ε
is the machine precision.
The approximate number of floating-point operations is
8
n
(
ihi
-
ilo
)
2
if
side
=
'L'
;
8
m
(
ihi
-
ilo
)
2
if
side
=
'R'
.
The real counterpart of this routine is ormhr.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804