Contents

# ?gttrf

Computes the LU factorization of a tridiagonal matrix.

## Syntax

Include Files
• mkl.h
Description
The routine computes the
LU
factorization of a real or complex tridiagonal matrix
A
using elimination with partial pivoting and row interchanges.
The factorization has the form
`A = L*U,`
where
L
is a product of permutation and unit lower bidiagonal matrices and
U
is upper triangular with nonzeroes in only the main diagonal and first two superdiagonals.
Input Parameters
n
The order of the matrix
A
;
n
0.
dl
,
d
,
du
Arrays containing elements of
A
.
The array
dl
of dimension
(
n
- 1)
contains the subdiagonal elements of
A
.
The array
d
of dimension
n
contains the diagonal elements of
A
.
The array
du
of dimension
(
n
- 1)
contains the superdiagonal elements of
A
.
Output Parameters
dl
Overwritten by the
(
n
-1)
multipliers that define the matrix
L
from the
LU
factorization of
A
.
d
Overwritten by the
n
diagonal elements of the upper triangular matrix
U
from the
LU
factorization of
A
.
du
Overwritten by the
(
n
-1)
elements of the first superdiagonal of
U
.
du2
Array, dimension
(
n
-2)
. On exit,
du2
contains
(
n
-2)
elements of the second superdiagonal of
U
.
ipiv
Array, dimension (
n
). The pivot indices: for 1 ≤
i
n
, row
i
was interchanged with row
ipiv
[
i
-1].
ipiv
[
i
-1] is always
i
or
i
+1;
ipiv
[
i
-1] =
i
indicates a row interchange was not required.
Return Values
This function returns a value
info
.
If
info
= 0
, the execution is successful.
If
info
=
-i
, parameter
i
If
info
=
i
,
u
i
i
is 0. The factorization has been completed, but
U
is exactly singular. Division by zero will occur if you use the factor
U
for solving a system of linear equations.
Application Notes
to solve
A*X
=
B
or
A
T
*X
=
B
or
A
H
*X
=
B
to estimate the condition number of
A
.

#### Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804