Contents

# ?hetri2x

Computes the inverse of a Hermitian indefinite matrix after
?hetri2
allocates memory
.

## Syntax

Include Files
• mkl.h
Description
The routine computes the inverse
inv(
A
)
of a Hermitian indefinite matrix
A
using the factorization
A
=
U*D*U
H
or
A
=
L*D*L
H
computed by
?hetrf
.
The
?hetri2x
actually computes the inverse after the
?hetri2
routine
allocates memory
before calling
?hetri2x
.
Input Parameters
matrix_layout
Specifies whether matrix storage layout is row major (
LAPACK_ROW_MAJOR
) or column major (
LAPACK_COL_MAJOR
).
uplo
Must be
'U'
or
'L'
.
Indicates how the input matrix
A
has been factored:
If
uplo
=
'U'
, the array
a
stores the factorization
A
=
U*D*U
H
.
If
uplo
=
'L'
, the array
a
stores the factorization
A
=
L*D*L
H
.
n
The order of the matrix
A
;
n
0
.
a
Arrays
a
(size max(1,
lda
*
n
))
contains the
nb
(block size) diagonal matrix
D
and the multipliers used to obtain the factor
U
or
L
as returned by
?hetrf
.
lda
a
;
lda
max(1,
n
)
.
ipiv
Array, size at least
max(1,
n
)
.
Details of the interchanges and the
nb
structure of
D
as returned by
?hetrf
.
nb
Block size.
Output Parameters
a
If
info
= 0, the symmetric inverse of the original matrix.
If
info
=
'U'
, the upper triangular part of the inverse is formed and the part of
A
below the diagonal is not referenced.
If
info
=
'L'
, the lower triangular part of the inverse is formed and the part of
A
above the diagonal is not referenced.
Return Values
This function returns a value
info
.
If
info
= 0, the execution is successful.
If
info
=
-i
, parameter
i
If
info
=
i
,
D
i
i
= 0;
D
is singular and its inversion could not be computed.

#### Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804