Developer Reference

Contents

p?gbsv

Computes the solution to the system of linear equations with a general banded distributed matrix and multiple right-hand sides.

Syntax

void
psgbsv
(
MKL_INT
*n
,
MKL_INT
*bwl
,
MKL_INT
*bwu
,
MKL_INT
*nrhs
,
float
*a
,
MKL_INT
*ja
,
MKL_INT
*desca
,
MKL_INT
*ipiv
,
float
*b
,
MKL_INT
*ib
,
MKL_INT
*descb
,
float
*work
,
MKL_INT
*lwork
,
MKL_INT
*info
);
void
pdgbsv
(
MKL_INT
*n
,
MKL_INT
*bwl
,
MKL_INT
*bwu
,
MKL_INT
*nrhs
,
double
*a
,
MKL_INT
*ja
,
MKL_INT
*desca
,
MKL_INT
*ipiv
,
double
*b
,
MKL_INT
*ib
,
MKL_INT
*descb
,
double
*work
,
MKL_INT
*lwork
,
MKL_INT
*info
);
void
pcgbsv
(
MKL_INT
*n
,
MKL_INT
*bwl
,
MKL_INT
*bwu
,
MKL_INT
*nrhs
,
MKL_Complex8
*a
,
MKL_INT
*ja
,
MKL_INT
*desca
,
MKL_INT
*ipiv
,
MKL_Complex8
*b
,
MKL_INT
*ib
,
MKL_INT
*descb
,
MKL_Complex8
*work
,
MKL_INT
*lwork
,
MKL_INT
*info
);
void
pzgbsv
(
MKL_INT
*n
,
MKL_INT
*bwl
,
MKL_INT
*bwu
,
MKL_INT
*nrhs
,
MKL_Complex16
*a
,
MKL_INT
*ja
,
MKL_INT
*desca
,
MKL_INT
*ipiv
,
MKL_Complex16
*b
,
MKL_INT
*ib
,
MKL_INT
*descb
,
MKL_Complex16
*work
,
MKL_INT
*lwork
,
MKL_INT
*info
);
Include Files
  • mkl_scalapack.h
Description
The
p?gbsv
function
computes the solution to a real or complex system of linear equations
sub(
A
)*
X
= sub(
B
)
,
where
sub(
A
) =
A
(
1:n
,
ja:ja+n-1
)
is an
n
-by-
n
real/complex general banded distributed matrix with
bwl
subdiagonals and
bwu
superdiagonals, and
X
and
sub(
B
)=
B
(
ib:ib+n-1
,
1:rhs
)
are
n
-by-
nrhs
distributed matrices.
The
LU
decomposition with partial pivoting and row interchanges is used to factor sub(
A
) as
sub(
A
) =
P
*
L
*
U
*
Q
, where
P
and
Q
are permutation matrices, and
L
and
U
are banded lower and upper triangular matrices, respectively. The matrix
Q
represents reordering of columns for the sake of parallelism, while
P
represents reordering of rows for numerical stability using classic partial pivoting.
Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.
Input Parameters
n
(global) The number of rows and columns to be operated on, that is, the order of the distributed matrix sub(
A
)
(
n
0)
.
bwl
(global) The number of subdiagonals within the band of
A
(0≤
bwl
n-1
).
bwu
(global) The number of superdiagonals within the band of
A
(0≤
bwu
n-1
).
nrhs
(global) The number of right hand sides; the number of columns of the distributed matrix sub(
B
)
(
nrhs
0)
.
a
,
b
(local)
Pointers into the local memory to arrays of local size
a
:
lld_a
*
LOCc
(
ja
+
n
-1)
and
b
:
lld_b
*
LOCc
(
nrhs
)
.
On entry, the array
a
contains the local pieces of the global array
A
.
On entry, the array
b
contains the right hand side distributed matrix sub(
B
).
ja
(global) The index in the global matrix
A
indicating the start of the matrix to be operated on (which may be either all of
A
or a submatrix of
A
).
desca
(global and local) array of size
dlen_
. The array descriptor for the distributed matrix
A
.
If
desca
[
dtype_
- 1]
= 501
, then
dlen_
7
;
else if
desca
[
dtype_
- 1]
= 1
, then
dlen_
9
.
ib
(global) The row index in the global matrix
B
indicating the first row of the matrix to be operated on (which may be either all of
B
or a submatrix of
B
).
descb
(global and local) array of size
dlen_
. The array descriptor for the distributed matrix
B
.
If
descb
[
dtype_
-1]
= 502
, then
dlen_
7
;
else if
descb
[
dtype_
-1]
= 1
, then
dlen_
9
.
work
(local)
Workspace array of size
lwork
.
lwork
(local or global) The size of the array
work
, must be at least
lwork
(
NB
+
bwu
)*(
bwl
+
bwu
)+6*(
bwl
+
bwu
)*(
bwl
+2
*bwu
) +
+ max(
nrhs
*(
NB
+2
*bwl
+4
*bwu
), 1)
.
Output Parameters
a
On exit, contains details of the factorization. Note that the resulting factorization is not the same factorization as returned from LAPACK. Additional permutations are performed on the matrix for the sake of parallelism.
b
On exit, this array contains the local pieces of the solution distributed matrix
X
.
ipiv
(local) array.
The size of
ipiv
must be at least
desca
[
NB
- 1]
. This array contains pivot indices for local factorizations. You should not alter the contents between factorization and solve.
work
[0]
On exit,
work
[0]
contains the minimum value of
lwork
required for optimum performance.
info
If
info
=0
, the execution is successful.
info
< 0
:
If the
i
th argument is an array and the
j
-th entry had an illegal value, then
info
= -(
i
*100+
j
)
; if the
i
th argument is a scalar and had an illegal value, then
info
=
-i
.
info
>
0
:
If
info
=
k
NPROCS
, the submatrix stored on processor
info
and factored locally was not nonsingular, and the factorization was not completed. If
info
=
k
>
NPROCS
, the submatrix stored on processor
info
-
NPROCS
representing interactions with other processors was not nonsingular, and the factorization was not completed.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804