Developer Reference

Contents

pardiso_getdiag

Returns diagonal elements of initial and factorized matrix.

Syntax

void
pardiso_getdiag
(
const
_MKL_DSS_HANDLE_t
pt
,
void
*
df
,
void
*
da
,
const
MKL_INT
*
mnum
,
MKL_INT
*
error
);
Include Files
  • mkl.h
Description
This routine returns the diagonal elements of the initial and factorized matrix for a real or Hermitian matrix.
In order to use this routine, you must set
iparm
[55]
to 1 before the main
pardiso
loop.
Input Parameters
pt
Array with a size of 64. Handle to internal data structure for the
Intel® MKL
PARDISO solver. The entries must be set to zero prior to the first call to
pardiso
. Unique for factorization.
mnum
Indicates the actual matrix for the solution phase of the
Intel® MKL
PARDISO solver. With this scalar you can define the diagonal elements of the factorized matrix that you want to obtain. The value must be: 1 ≤
mnum
maxfct
. In most applications this value is 1.
Output Parameters
df
Array with a dimension of
n
. Contains diagonal elements of the factorized matrix after factorization.
Elements of
df
correspond to diagonal elements of matrix
L
computed during phase 22. Because during phase 22
Intel® MKL
PARDISO makes additional permutations to improve stability, it is possible that array
df
is not in line with the
perm
array computed during phase 11.
da
Array with a dimension of
n
. Contains diagonal elements of the initial matrix.
Elements of
da
correspond to diagonal elements of matrix
L
computed during phase 22. Because during phase 22
Intel® MKL
PARDISO makes additional permutations to improve stability, it is possible that array
da
is not in line with the
perm
array computed during phase 11.
error
The error indicator.
error
Information
0
no error
-1
Diagonal information not turned on before
pardiso
main loop (
iparm
[55]
=0).

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804