Developer Reference

  • 2020.2
  • 07/15/2020
  • Public Content
Contents

Running FFTW2 Interface Wrapper Examples

Intel® MKL
provides examples to demonstrate how to use the MPI FFTW wrapper library. The source code for the examples, makefiles used to run them, and files with lists of examples are located in the
.\examples\fftw2xf
subdirectory in the
Intel® MKL
directory. To build examples, several additional files are needed:
fftw.h
,
fftw_threads.h
,
rfftw.h
,
rfftw_threads.h
, and
fftw_f77.i
. These files are distributed with permission from FFTW and are available in
.\include\fftw
. The original files can also be found in FFTW 2.1.5 at http://www.fftw.org/download.html.
An example makefile uses the
function
parameter in addition to the parameters of the corresponding wrapper library makefile (see Creating a Wrapper Library). The makefile comment heading provides the exact description of these parameters.
An example makefile normally invokes examples. However, if the appropriate wrapper library is not yet created, the makefile first builds the library the same way as the wrapper library makefile does and then proceeds to examples.
If the parameter
function=<example_name>
is defined, only the specified example runs. Otherwise, all examples from the appropriate subdirectory run. The subdirectory
.\_results
is created, and the results are stored there in the
<example_name>.res
files.
Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804