Developer Reference

  • 098
  • 03/30/2020
  • Public Content
Contents

mkl_sparse_?_set_value

Changes a single value of matrix in internal representation.

Syntax

stat = mkl_sparse_s_set_value
(
A
,
row
,
col
,
value
);
stat = mkl_sparse_d_set_value
(
A
,
row
,
col
,
value
);
stat = mkl_sparse_c_set_value
(
A
,
row
,
col
,
value
);
stat = mkl_sparse_z_set_value
(
A
,
row
,
col
,
value
);
Include Files
  • mkl_spblas.f90
Description
Use the
mkl_sparse_?_set_value
routine to change a single value of a matrix in the internal Inspector-executor Sparse BLAS format. The value should already be presented in a matrix structure.
Input Parameters
A
SPARSE_MATRIX_T
.
Specifies handle containing internal data.
row
C_INT
.
Indicates row of matrix in which to set value.
col
C_INT
.
Indicates column of matrix in which to set value.
value
C_FLOAT
for
mkl_sparse_s_create_csr
C_DOUBLE
for
mkl_sparse_d_create_csr
C_FLOAT_COMPLEX
for
mkl_sparse_c_create_csr
C_DOUBLE_COMPLEX
for
mkl_sparse_z_create_csr
Indicates value
Output Parameters
A
Handle containing modified internal data.
stat
INTEGER
.
Value indicating whether the operation was successful or not, and why:
SPARSE_STATUS_SUCCESS
The operation was successful.
SPARSE_STATUS_NOT_INITIALIZED
The routine encountered an empty handle or matrix array.
SPARSE_STATUS_INVALID_VALUE
The input parameters contain an invalid value.
SPARSE_STATUS_INTERNAL_ERROR
An error in algorithm implementation occurred.
1

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reservered for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804