Developer Reference

  • 098
  • 03/30/2020
  • Public Content
Contents

?sctr

Converts compressed sparse vectors into full storage form.

Syntax

call ssctr
(
nz
,
x
,
indx
,
y
)
call dsctr
(
nz
,
x
,
indx
,
y
)
call csctr
(
nz
,
x
,
indx
,
y
)
call zsctr
(
nz
,
x
,
indx
,
y
)
call sctr
(
x
,
indx
,
y
)
Include Files
  • mkl.fi
    ,
    blas.f90
Description
The
?sctr
routines scatter the elements of the compressed sparse vector (
nz
,
x
,
indx
) to a full-storage vector
y
. The routines modify only the elements of
y
whose indices are listed in the array
indx
:
y
(
indx
(
i
)) =
x
(
i
)
, for
i
=1,2,... ,
nz
.
Input Parameters
nz
INTEGER
.
The number of elements of
x
to be scattered.
indx
INTEGER
.
Specifies indices of elements to be scattered.
Array, size at least
nz
.
x
REAL
for
ssctr
DOUBLE PRECISION
for
dsctr
COMPLEX
for
csctr
DOUBLE COMPLEX
for
zsctr
Array, size at least
nz
.
Contains the vector to be converted to full-storage form.
Output Parameters
y
REAL
for
ssctr
DOUBLE PRECISION
for
dsctr
COMPLEX
for
csctr
DOUBLE COMPLEX
for
zsctr
Array, size at least max(
indx(i)
).
Contains the vector
y
with updated elements.
BLAS 95 Interface Notes
Routines in Fortran 95 interface have fewer arguments in the calling sequence than their FORTRAN 77 counterparts. For general conventions applied to skip redundant or reconstructible arguments, see BLAS 95 Interface Conventions.
Specific details for the routine
sctr
interface are the following:
x
Holds the vector with the number of elements
nz
.
indx
Holds the vector with the number of elements
nz
.
y
Holds the vector with the number of elements
nz
.
1

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804