Developer Reference

  • 2020.2
  • 07/15/2020
  • Public Content
Contents

?laneg

Computes the Sturm count, the number of negative pivots encountered while factoring tridiagonal
T
-
sigma
*
I
=
L
*
D
*
L
T
.

Syntax

value
=
slaneg
(
n
,
d
,
lld
,
sigma
,
pivmin
,
r
)
value
=
dlaneg
(
n
,
d
,
lld
,
sigma
,
pivmin
,
r
)
Include Files
  • mkl.fi
Description
The routine computes the Sturm count, the number of negative pivots encountered while factoring tridiagonal
T
-
sigma
*
I
=
L
*
D
*
L
T
. This implementation works directly on the factors without forming the tridiagonal matrix
T
. The Sturm count is also the number of eigenvalues of
T
less than
sigma
. This routine is called from
?larb
. The current routine does not use the
pivmin
parameter but rather requires IEEE-754 propagation of infinities and
NaN
s (
NaN
stands for 'Not A Number'). This routine also has no input range restrictions but does require default exception handling such that
x
/0
produces
Inf
when
x
is non-zero, and
Inf/Inf
produces
NaN
. (For more information see [Marques06]).
Input Parameters
n
INTEGER
. The order of the matrix.
d
REAL
for
slaneg
DOUBLE PRECISION
for
dlaneg
Array,
DIMENSION
(
n
).
Contains
n
diagonal elements of the matrix
D
.
lld
REAL
for
slaneg
DOUBLE PRECISION
for
dlaneg
Array,
DIMENSION
(
n
-1
).
Contains
(
n
-1)
elements
L
(i)*
L
(i)*
D
(i)
.
sigma
REAL
for
slaneg
DOUBLE PRECISION
for
dlaneg
Shift amount in
T
-
sigma
*
I
=
L
*
D
*
L
**
T
.
pivmin
REAL
for
slaneg
DOUBLE PRECISION
for
dlaneg
The minimum pivot in the Sturm sequence. May be used when zero pivots are encountered on non-IEEE-754 architectures.
r
INTEGER
.
The twist index for the twisted factorization that is used for the negcount.
Output Parameters
value
INTEGER
. The number of negative pivots encountered while factoring.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804