Developer Reference

  • 2020.2
  • 07/15/2020
  • Public Content
Contents

?larra

Computes the splitting points with the specified threshold.

Syntax

call slarra
(
n
,
d
,
e
,
e2
,
spltol
,
tnrm
,
nsplit
,
isplit
,
info
)
call dlarra
(
n
,
d
,
e
,
e2
,
spltol
,
tnrm
,
nsplit
,
isplit
,
info
)
Include Files
  • mkl.fi
Description
The routine computes the splitting points with the specified threshold and sets any "small" off-diagonal elements to zero.
Input Parameters
n
INTEGER
. The order of the matrix (
n
>
1
).
d
REAL
for
slarra
DOUBLE PRECISION
for
dlarra
Array,
DIMENSION
(
n
).
Contains
n
diagonal elements of the tridiagonal matrix
T
.
e
REAL
for
slarra
DOUBLE PRECISION
for
dlarra
Array,
DIMENSION
(
n
).
First
(
n
-1)
entries contain the subdiagonal elements of the tridiagonal matrix
T
;
e
(
n
)
need not be set.
e2
REAL
for
slarra
DOUBLE PRECISION
for
dlarra
Array,
DIMENSION
(
n
).
First
(
n
-1)
entries contain the squares of the subdiagonal elements of the tridiagonal matrix
T
;
e2
(
n
)
need not be set.
spltol
REAL
for
slarra
DOUBLE PRECISION
for
dlarra
The threshold for splitting. Two criteria can be used:
spltol
<0
: criterion based on absolute off-diagonal value;
spltol
>0 : criterion that preserves relative accuracy.
tnrm
REAL
for
slarra
DOUBLE PRECISION
for
dlarra
The norm of the matrix.
Output Parameters
e
On exit, the entries
e
(
isplit
(i)), 1 ≤ i ≤
nsplit
, are set to zero, the other entries of
e
are untouched.
e2
On exit, the entries
e2
(
isplit
(i)), 1 ≤ i ≤
nsplit
, are set to zero.
nsplit
INTEGER
.
The number of blocks the matrix
T
splits into.
1 ≤
nsplit
n
isplit
INTEGER
.
Array,
DIMENSION
(
n
).
The splitting points, at which
T
breaks up into blocks. The first block consists of rows/columns
1
to
isplit
(1)
, the second of rows/columns
isplit
(1)+1
through
isplit
(2)
, and so on, and the
nsplit
-th consists of rows/columns
isplit
(
nsplit
-1)+1
through
isplit
(
nsplit
)=
n
.
info
INTEGER
.
= 0
: successful exit.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific