Developer Reference

  • 2020.2
  • 07/15/2020
  • Public Content
Contents

?laswp

Performs a series of row interchanges on a general rectangular matrix.

Syntax

call slaswp
(
n
,
a
,
lda
,
k1
,
k2
,
ipiv
,
incx
)
call dlaswp
(
n
,
a
,
lda
,
k1
,
k2
,
ipiv
,
incx
)
call claswp
(
n
,
a
,
lda
,
k1
,
k2
,
ipiv
,
incx
)
call zlaswp
(
n
,
a
,
lda
,
k1
,
k2
,
ipiv
,
incx
)
Include Files
  • mkl.fi
Description
The routine performs a series of row interchanges on the matrix
A
. One row interchange is initiated for each of rows
k1
through
k2
of
A
.
Input Parameters
The data types are given for the Fortran interface.
n
INTEGER
.
The number of columns of the matrix
A
.
a
REAL
for
slaswp
DOUBLE PRECISION
for
dlaswp
COMPLEX
for
claswp
DOUBLE COMPLEX
for
zlaswp
.
Array, size
lda
by
n
.
Array
a
contains the
m
-by-
n
matrix
A
.
lda
INTEGER
.
The leading dimension of the array
a
.
k1
INTEGER
.
The first element of
ipiv
for which a row interchange will be done.
k2
INTEGER
.
The last element of
ipiv
for which a row interchange will be done.
ipiv
INTEGER
.
Array, size
k1
+(
k2
-
k1
)*|
incx
|)
.
The vector of pivot indices. Only the elements in positions
k1
through
k2
of
ipiv
are accessed.
ipiv
(
k
) =
l
implies rows
k
and
l
are to be interchanged.
incx
INTEGER
.
The increment between successive values of
ipiv
. If
ipiv
is negative, the pivots are applied in reverse order.
Output Parameters
a
On exit, the permuted matrix.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804