Developer Reference

  • 2020.2
  • 07/15/2020
  • Public Content
Contents

?tfttp

Copies a triangular matrix from the rectangular full packed format (TF) to the standard packed format (TP) .

Syntax

call stfttp
(
transr
,
uplo
,
n
,
arf
,
ap
,
info
)
call dtfttp
(
transr
,
uplo
,
n
,
arf
,
ap
,
info
)
call ctfttp
(
transr
,
uplo
,
n
,
arf
,
ap
,
info
)
call ztfttp
(
transr
,
uplo
,
n
,
arf
,
ap
,
info
)
Include Files
  • mkl.fi
Description
The routine copies a triangular matrix
A
from the Rectangular Full Packed (RFP) format to the standard packed format. For the description of the RFP format, see Matrix Storage Schemes.
Input Parameters
transr
CHARACTER*1
.
= 'N':
arf
is in the Normal format,
= 'T':
arf
is in the Transpose format (for
stfttp
and
dtfttp
),
= 'C':
arf
is in the Conjugate-transpose format (for
ctfttp
and
ztfttp
).
uplo
CHARACTER*1
.
Specifies whether
A
is upper or lower triangular:
= 'U': A is upper triangular,
= 'L': A is lower triangular.
n
INTEGER
.
The order of the matrix
A
.
n
0
.
arf
REAL
for
stfttp
,
DOUBLE PRECISION
for
dtfttp
,
COMPLEX
for
ctfttp
,
DOUBLE COMPLEX
for
ztfttp
.
Array, size at least
max
(1,
n
*(
n
+1)/2).
On entry, the upper or lower triangular matrix
A
stored in the RFP format.
Output Parameters
ap
REAL
for
stfttp
,
DOUBLE PRECISION
for
dtfttp
,
COMPLEX
for
ctfttp
,
DOUBLE COMPLEX
for
ztfttp
.
Array, size at least
max
(1,
n
*(
n
+1)/2).
On exit, the upper or lower triangular matrix
A
, packed columnwise in a linear array.
The
j
-th column of
A
is stored in the array
ap
as follows:
if
uplo
= 'U',
ap
(i + (j-1)*j/2)
=
A(i,j)
for 1
i
j
,
if
uplo
= 'L',
ap
(i + (j-1)*(2n-j)/2)
=
A(i,j)
for
j
i
n
.
info
INTEGER
.
If
info
= 0
, the execution is successful.
If
info
< 0
, the
i
-th parameter had an illegal value.
If
info
= -1011
, memory allocation error occurred.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel doe