Developer Reference

  • 2020.2
  • 07/15/2020
  • Public Content
Contents

vRngLaplace

Generates random numbers with Laplace distribution.

Syntax

status
=
vsrnglaplace
(
method
,
stream
,
n
,
r
,
a
,
beta
)
status
=
vdrnglaplace
(
method
,
stream
,
n
,
r
,
a
,
beta
)
Include Files
  • mkl.fi
    ,
    mkl_vsl.f90
Input Parameters
Name
Type
Description
method
INTEGER
,
INTENT(IN)
Generation method. The specific values are as follows:
VSL_RNG_METHOD_LAPLACE_ICDF
Inverse cumulative distribution function method
stream
TYPE (VSL_STREAM_STATE)
,
INTENT(IN)
Descriptor of the stream state structure.
n
INTEGER
,
INTENT(IN)
Number of random values to be generated
a
DOUBLE PRECISION
for
vdrnglaplace
REAL
(KIND=4)
,
INTENT(IN)
for
vsrnglaplace
REAL
(KIND=8)
,
INTENT(IN)
for
vdrnglaplace
Mean value
a
beta
DOUBLE PRECISION
for
vdrnglaplace
REAL
(KIND=4)
,
INTENT(IN)
for
vsrnglaplace
REAL
(KIND=8)
,
INTENT(IN)
for
vdrnglaplace
Scalefactor
β
.
Output Parameters
Name
Type
Description
r
DOUBLE PRECISION
for
vdrnglaplace
REAL
(KIND=4)
,
INTENT(OUT)
for
vsrnglaplace
REAL
(KIND=8)
,
INTENT(OUT)
for
vdrnglaplace
Vector of
n
Laplace distributed random numbers
Description
The
vRngLaplace
function generates random numbers with Laplace distribution with mean value (or average)
a
and scalefactor
β
, where
a
,
β
R
;
β
> 0
. The scalefactor value determines the standard deviation as
Equation
The probability density function is given by:
Equation
The cumulative distribution function is as follows:
Equation
Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by