Developer Reference

  • 2020.2
  • 07/15/2020
  • Public Content
Contents

Usage Examples for CNR Support Functions

The following examples illustrate usage of support functions for conditional numerical reproducibility.

Setting Automatically Detected CNR Branch

PROGRAM MAIN INCLUDE 'mkl.fi' INTEGER*4 MY_CBWR_BRANCH C Find the available MKL_CBWR_BRANCH automatically MY_CBWR_BRANCH = MKL_CBWR_GET_AUTO_BRANCH() C User code without Intel MKL calls C Piece of the code where CNR of Intel MKL is needed C The performance of Intel MKL functions might be reduced for CNR mode IF (MKL_CBWR_SET (MY_CBWR_BRANCH) .NE. MKL_CBWR_SUCCESS) THEN PRINT *, 'Error in setting MKL_CBWR_BRANCH! Aborting…' RETURN ENDIF C CNR calls to Intel MKL + any other code END

Use of the
mkl_cbwr_get
Function

PROGRAM MAIN INCLUDE 'mkl.fi' INTEGER*4 MY_CBWR_BRANCH C Piece of the code where CNR of Intel MKL is analyzed MY_CBWR_BRANCH = MKL_CBWR_GET(MKL_CBWR_BRANCH) IF (MY_CBWR_BRANCH .EQ. MKL_CBWR_AUTO) THEN C actions in case of automatic mode ELSE IF (MY_CBWR_BRANCH .EQ. MKL_CBWR_SSSE3) THEN C actions for SSSE3 code ELSE C all other cases ENDIF C User code END
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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804