Enables dispatching for new Intel® architectures or restricts the set of Intel® instruction sets available for dispatching.
The latest Intel® instruction-set architecture (ISA) for
does run-time processor dispatching to identify appropriate internal code paths to traverse for
functions called by the application. The
mkl_enable_instructionsfunction controls the behavior of the dispatcher to do either of the following:
- Enable dispatching for new Intel architectures.does not dispatch instruction sets that do not have silicon available at time of the product launch. CallIntel® MKLmkl_enable_instructionsto enable dispatching the code path for such an ISA in a simulator environment or on hardware that supports this ISA.
- Restrict the set of Intel instruction sets available for dispatching.Callmkl_enable_instructionsto restrict dispatching to code paths for earlier ISA. For example, if the hardware supports Intel AVX, a call tomkl_enable_instructionswith theMKL_ENABLE_SSE4_2parameter forces the dispatcher to use the Intel SSE4-2 code path.
If the system does not support the instruction set specified by the
isaparameter or if the system is based on a non-Intel architecture,
mkl_enable_instructionsdoes nothing and returns zero.
Settings specified by the
mkl_enable_instructionsfunction set an upper limit to settings specified by the
You can use the
MKL_ENABLE_INSTRUCTIONSenvironment variable instead of calling
mkl_enable_instructions(for more details, see the
); however, the settings specified by the function take precedence over the settings specified by the environment variable.
Function completion status:
dispatches the code path for the specified ISA by default.
0 - The request is rejected. Usually this occurs if
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.