Developer Guide

Contents

Getting Started with Conditional Numerical Reproducibility

Intel® MKL
offers functions and environment variables to help you get reproducible results. You can configure
Intel® MKL
using functions or environment variables, but the functions provide more flexibility.
The following specific examples introduce you to the conditional numerical reproducibility.
While these examples recommend aligning input and output data, you can supply unaligned data to
Intel® MKL
functions running in the CNR mode, but refer to Reproducibility Conditions for details related to data alignment.

Intel CPUs supporting Intel AVX2

To ensure
Intel® MKL
calls return the same results on every Intel CPU supporting Intel AVX2 instructions:
  1. Make sure that your application uses a fixed number of threads
  2. (Recommended) Properly align input and output arrays in
    Intel® MKL
    function calls
  3. Do either of the following:
    • Call
      mkl_cbwr_set(MKL_CBWR_AVX2)
    • Set the environment variable:
      export MKL_CBWR = AVX2
On non-Intel CPUs and on Intel CPUs that do not support Intel AVX2, this environment setting may cause results to differ because the
AUTO
branch is used instead, while the above function call returns an error and does not enable the CNR mode.

Intel CPUs supporting Intel SSE2

To ensure
Intel® MKL
calls return the same results on every Intel CPU supporting Intel SSE2instructions:
  1. Make sure that your application uses a fixed number of threads
  2. (Recommended) Properly align input and output arrays in
    Intel® MKL
    function calls
  3. Do either of the following:
    • Call
      mkl_cbwr_set(MKL_CBWR_SSE2)
    • Set the environment variable:
      export MKL_CBWR = SSE2
On non-Intel CPUs, this environment setting may cause results to differ because the
AUTO
branch is used instead, while the above function call returns an error and does not enable the CNR mode.

Intel or Intel compatible CPUs supporting Intel SSE2

On non-Intel CPUs, only the
MKL_CBWR_AUTO
and
MKL_CBWR_COMPATIBLE
options are supported for function calls and only
AUTO
and
COMPATIBLE
options for environment settings.
To ensure
Intel® MKL
calls return the same results on all Intel or Intel compatible CPUs supporting Intel SSE2 instructions:
  1. Make sure that your application uses a fixed number of threads
  2. (Recommended) Properly align input and output arrays in
    Intel® MKL
    function calls
  3. Do either of the following:
    • Call
      mkl_cbwr_set(MKL_CBWR_COMPATIBLE)
    • Set the environment variable:
      export MKL_CBWR = COMPATIBLE
The special
MKL_CBWR_COMPATIBLE/COMPATIBLE
option is provided because Intel and Intel compatible CPUs have a few instructions, such as approximation instructions rcpps/rsqrtps, that may return different results. This option ensures that
Intel® MKL
does not use these instructions and forces a single Intel SSE2 only code path to be executed.

Next steps

for details of specifying the branch using environment variables.
See the following sections in the
Intel® MKL
Developer Reference
:
Support Functions for Conditional Numerical Reproducibility
for how to configure the CNR mode of
Intel® MKL
using functions.
Intel® MKL
PARDISO - Parallel Direct Sparse Solver Interface
for how to configure the CNR mode for PARDISO.
Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804