Instruction Set Specific Dispatching on Intel® Architectures
Dispatched by Default
Intel® Advanced Vector Extensions (Intel® AVX-512) for systems based on Intel® Xeon® processors
Intel® Advanced Vector Extensions (Intel® AVX-512) with support for Vector Neural Network Instructions.
ICX: Intel® Advanced Vector Extensions (Intel® AVX-512) enabled processors.
Intel® Advanced Vector Extensions (Intel® AVX-512) for systems based on Intel® Xeon Phi™ processors
Intel® Advanced Vector Extensions 512 (Intel® AVX-512) for Intel® Many Integrated Core Architecture (Intel® MIC Architecture) with support for AVX512_4FMAPS and AVX512_4VNNIW instruction groups enabled processors
- To turn on automatic CPU-based dispatching of Intel AVX-512 with support of AVX512_4FMAPS and AVX512_4VNNI instruction groups on systems based on Intel Xeon Phi processors, do one of the following:
- Set the environment variable:set MKL_ENABLE_INSTRUCTIONS=AVX512_MIC_E1
- To configure the library not to dispatch more recent architectures than Intel AVX2, do one of the following:
- Set the environment variable:set MKL_ENABLE_INSTRUCTIONS=AVX2
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804