Layered Model Concept
- Interface Layer
- Threading Layer
- Computational Layer
This layer matches compiled code of your application with the threading and/or computational parts of the library. This layer provides:
This layer is compiled for different environments (threaded or sequential) and compilers (from Intel and PGI*).
This layer accommodates multiple architectures through identification of architecture features and chooses the appropriate binary code at run time.
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804