• 2019 Update 7
  • 03/31/2020

Threading Runtimes Support

Intel® MPI Library Developer Guide for Linux* OS
The MPI thread-split programming model has special support of the OpenMP* runtime, but you may use any other threading runtime. The support differs in the way you communicate with the MPI runtime to set up
for a thread and the way you set up the number of threads to be run concurrently. If you choose the OpenMP runtime support, make sure you have the OpenMP runtime library, which comes with the recent Intel® compilers and GNU* gcc compilers, and link the application against it.
The support is controlled with the
environment variable. Since the threading runtime support is a non-standard functionality, you must enable it explicitly using the
argument for the OpenMP* runtime support.
You can set the maximum number of threads to be used in each process concurrently with the
environment variable. This helps the MPI implementation allocate the hardware resources efficiently. By default, the maximum number of threads per rank is 1.

OpenMP* Threading Runtime

The OpenMP runtime supports the both implicit and explicit submodels. By default, the Intel MPI Library assumes that
is set with the
function call defined in the OpenMP standard. This scenario corresponds to the implicit submodel. You can use the explicit submodel by setting the
info key for a communicator, which is particularly useful for OpenMP tasks.
By default, the maximum number of threads is set with the
function. To override this function, set either
environment variable.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804