Developer Guide and Reference

Contents

m

Tells the compiler which features it may target, including which instruction set architecture (ISA) it may generate.

Syntax

Linux:
-m
code
Windows:
None
Arguments
code
Indicates to the compiler a feature set that it may target, including which instruction sets it may generate. Many of the following descriptions refer to Intel® Streaming SIMD Extensions (Intel® SSE) and Supplemental Streaming SIMD Extensions (SSSE). Possible values are:
avx
May generate Intel® Advanced Vector Extensions (Intel® AVX), SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
sse4.2
May generate Intel® SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
sse4.1
May generate Intel® SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
ssse3
May generate SSSE3 instructions and Intel® SSE3, SSE2, and SSE instructions.
sse3
May generate Intel® SSE3, SSE2, and SSE instructions.
sse2
May generate Intel® SSE2 and SSE instructions.
sse
This setting has been deprecated; it is the same as specifying
ia32
.
ia32
Generates x86/x87 generic code that is compatible with IA-32 architecture. Disables any default extended instruction settings, and any previously set extended instruction settings. It also disables all feature-specific optimizations and instructions.
This value is only available on Linux* systems using IA-32 architecture.
This compiler option also supports many of the
-m
option settings available with gcc. For more information on gcc settings for
-m
, see the gcc documentation.
Default
-msse2
For more information on the default values, see Arguments above.
Description
This option tells the compiler which features it may target, including which instruction sets it may generate.
Code generated with these options should execute on any compatible, non-Intel processor with support for the corresponding instruction set.
Options
-x
and
-m
are mutually exclusive. If both are specified, the compiler uses the last one specified and generates a warning.
For compatibility with gcc, the compiler allows the following options but they have no effect. You will get a warning error, but the instructions associated with the name will not be generated. You should use the suggested replacement options.
gcc Compatibility Option
Suggested Replacement Option
-mfma
-march=core-avx2
-mbmi
,
-mavx2
,
-mlzcnt
-march=core-avx2
-mmovbe
-march=atom -minstruction=movbe
-mcrc32
,
-maes
,
-mpclmul
,
-mpopcnt
-march=corei7
-mvzeroupper
-march=corei7-avx
-mfsgsbase
,
-mrdrnd
,
-mf16c
-march=core-avx-i
IDE Equivalent
None
Alternate Options
None

Product and Performance Information

1

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.