Developer Guide

Contents

Force a Single Store Ring to Reduce Area (
-Xsforce-single-store-ring
)

When the
Intel® oneAPI
DPC++/C++
Compiler
implements a ring topology for the global memory interconnect (either by automatic choice or by forcing the ring through
-Xsglobal-ring
), it widens the interconnect by default to allow more writes to occur in parallel. This allows for saturation of the global memory throughput using write-only traffic. The
-Xsforce-single-store-ring
option allows you to save area if you do not require that much write bandwidth.
To narrow the interconnect in order to save area while limiting write-only throughput to one bank's worth, use the
-Xsforce-single-store-ring
option in your
dpcpp
command.
Example
dpcpp -fintelfpga –Xshardware -Xsforce-single-store-ring <source_file>.cpp

Product and Performance Information

1

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.