Developer Guide


Force Ring Interconnect for Global Memory (

Intel® oneAPI DPC++/C++ Compiler
attempts to choose an optimal global memory interconnect topology based on various characteristics of the design.
To override the compiler's choice and force a ring topology, use the
option in your
dpcpp -fintelfpga -Xshardware
command. This can improve your kernel f
. In particular, designs that target board support packages with four or more banks of global memory may see an f
benefit from this option.
dpcpp -fintelfpga -Xshardware -Xsglobal-ring <source_file>.cpp

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804