Developer Guide

Contents

Modify the Handshaking Protocol (
-Xshyper-optimized-handshaking
)

To modify the handshaking protocol used in certain areas of your design, use the
-Xshyper-optimized-handshaking=<auto|off>
option in your
dpcpp
command. The
-Xshyper-optimized-handshaking
option can be set to one of the following values:
  • auto
    : The default behavior without the option specified. The
    Intel® oneAPI DPC++/C++ Compiler
    enables the optimization if it is possible to do so, else it sets to off. Use this value when you want to achieve a higher f
    MAX
    . When you enable the optimization, the
    Intel® oneAPI DPC++/C++ Compiler
    adds pipeline registers to the handshaking paths of the stallable nodes. As a result, you observe higher f
    MAX
    at the cost of increased area and latency.
  • off
    : The
    Intel® oneAPI DPC++/C++ Compiler
    attempts to optimize for lower latency at the potential cost of lower f
    MAX
    . Disabling hyper-optimized handshaking might also decrease area. This is useful for smaller designs where you are willing to give up f
    MAX
    for lower latency and area.
Examples
dpcpp -fintelfpga -Xshardware -Xshyper-optimized-handshaking=auto <source_file>.cpp
dpcpp -fintelfpga -Xshardware -Xshyper-optimized-handshaking=off <source_file>.cpp
The
-Xshyper-optimized-handshaking
option applies only to designs targeting Intel® Stratix® 10 devices. If you use this option on target devices other than Intel® Stratix® 10 devices, the compiler fails and produces an error. This option applies only when running the report or hardware flow.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804