Developer Guide


Maximum Frequency (f

The maximum clock frequency at which a digital circuit can operate is called its f
. This is the maximum rate at which the outputs of registers are updated.
The physical propagation delay of the signal across combinational logic between two consecutive register stages limits the clock speed. This propagation delay is a function of the complexity of the combinational logic in the path.
The path with the most combinational logic elements (and the highest delay) limits the speed of the entire circuit. This speed limiting path is often referred to as the
critical path
The f
is calculated as the inverse of the critical path delay. You may want to have high f
since it results in high performance in the absence of other bottlenecks.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804