FPGA Memory Attributes
The following table summarizes memory attributes:
Attribute
| Description
| Example
|
---|---|---|
register | Forces a variable or an array to be carried through the pipeline in registers.
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memory | Forces a variable or an array to be implemented as an embedded memory.
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numbanks | Specifies that the memory implementing the variable or array must have a defined number of memory banks.
|
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bank_bits | Specifies that the local memory addresses should use bits for bank selection,
|
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bankwidth | Specifies that the memory implementing the variable or array must have memory banks of a defined width.
|
|
singlepump | Specifies that the memory implementing the variable or array must be clocked at the same rate as the kernel accessing it.
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doublepump | Specifies that the memory implementing the variable or an array must be clocked at twice the rate as the kernel accessing it.
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private_copies | Specifies that the memory implementing the variable or an array has no more than the specified number of independent copies to enable concurrent thread or loop iteration accesses.
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max_replicates
| Specifies that the memory implementing the variable or an array has no more than the specified number of replicates to enable simultaneous accesses from the datapath.
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simple_dual_port | Specifies that the memory implementing the variable or array should have no port that serves both reads and writes.
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merge | Allows merging of two or more variables or arrays defined in the same scope with respect to width or depth.
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force_pow2_depth | Specifies that the memory implementing the variable or array has a power-of-2 depth.
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