Developer Reference

  • 0.10
  • 10/21/2020
  • Public Content
Contents

BLAS Functionality

DPC++
Functionality
DPC++ CPU
DPC++ GPU
Level 1 BLAS (standard)
All
All
Level 2 BLAS (standard)
All
All
Level 3 BLAS (standard)
All
All
BLAS Extensions and Specializations
{AXPY,GEMM,TRSM}_BATCH (group and strided)
{AXPY,GEMM,TRSM}_BATCH (group and strided)
GEMMT
HGEMM{_BATCH} (group and strided)
HGEMM{_BATCH}
GEMMT
Integer GEMM (s8s8,s8u8,u8s8,u8u8)
Integer GEMM (s8s8,s8u8,u8s8,u8u8)
Bfloat16 GEMM
C
Functionality
C CPU
C OpenMP Offload GPU
Level 1 BLAS (standard)
All
All
Level 2 BLAS (standard)
All
All
Level 3 BLAS (standard)
All
All
BLAS Extensions and Specializations
{AXPY,GEMM,TRSM}_BATCH (group and strided)
{AXPY,GEMM,TRSM}_BATCH (group and strided)
GEMMT, AXPBY, GEMM3M
GEMMT
Integer GEMM (s8u8)
Bfloat16 GEMM
JIT GEMM API
PACK GEMM API
COMPACT GEMM API
Fortran
Functionality
Fortan CPU
Fortran OpenMP Offload GPU
Level 1 BLAS (standard)
All
All
Level 2 BLAS (standard)
All
All
Level 3 BLAS (standard)
All
All
BLAS Extensions and Specializations
{AXPY,GEMM,TRSM}_BATCH (group and strided)
{AXPY,GEMM,TRSM}_BATCH (strided)
GEMMT, AXPBY, GEMM3M
GEMMT
Integer GEMM (s8u8)
JIT GEMM API
PACK GEMM API
COMPACT GEMM API

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804