Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

cblas_?hpmv

Computes a matrix-vector product using a Hermitian packed matrix.

Syntax

void
cblas_chpmv
(
const
CBLAS_LAYOUT
Layout
,
const
CBLAS_UPLO
uplo
,
const
MKL_INT
n
,
const
void
*alpha
,
const
void
*ap
,
const
void
*x
,
const
MKL_INT
incx
,
const
void
*beta
,
void
*y
,
const
MKL_INT
incy
);
void
cblas_zhpmv
(
const
CBLAS_LAYOUT
Layout
,
const
CBLAS_UPLO
uplo
,
const
MKL_INT
n
,
const
void
*alpha
,
const
void
*ap
,
const
void
*x
,
const
MKL_INT
incx
,
const
void
*beta
,
void
*y
,
const
MKL_INT
incy
);
Include Files
  • mkl.h
Description
The
?hpmv
 routines perform a matrix-vector operation defined as 
y := alpha*A*x + beta*y,
where:
alpha
 and
beta
 are scalars,
x
 and
y
 are
n
-element vectors,
A
 is an
n
-by-
n
 Hermitian matrix, supplied in packed form.
Input Parameters
Layout
Specifies whether two-dimensional array storage is row-major (
CblasRowMajor
) or column-major (
CblasColMajor
).
uplo
Specifies whether the upper or lower triangular part of the matrix
A
 is supplied in the packed array
ap
.
If
uplo
 =
CblasUpper
, then the upper triangular part of the matrix
A
 is supplied in the packed array
ap
 .
If
uplo
 =
CblasLower
, then the low triangular part of the matrix
A
 is supplied in the packed array
ap
 .
n
Specifies the order of the matrix
A
. The value of
n
 must be at least zero.
alpha
Specifies the scalar
alpha
.
ap
Array, size at least
((
n
*(
n
 + 1))/2)
.
For
Layout
 =
CblasColMajor
:
Before entry with
uplo
 =
CblasUpper
, the array
ap
 must contain the upper triangular part of the Hermitian matrix packed sequentially, column-by-column, so that
ap
[0]
 contains
A
1, 1
,
ap
[1]
 and
ap
[2]
 contain
A
1, 2
 and
A
2, 2
 respectively, and so on. Before entry with
uplo
 =
CblasLower
, the array
ap
 must contain the lower triangular part of the Hermitian matrix packed sequentially, column-by-column, so that
ap
[0]
 contains
A
1, 1
,
ap
[1]
 and
ap
[2]
 contain
A
2, 1
 and
A
3, 1
 respectively, and so on.
For
Layout
 =
CblasRowMajor
:
Before entry with
uplo
 =
CblasUpper
, the array
ap
 must contain the upper triangular part of the Hermitian matrix packed sequentially, row-by-row,
ap
[0]
 contains
A
1, 1
,
ap
[1]
 and
ap
[2]
 contain
A
1, 2
 and
A
1, 3
 respectively, and so on. Before entry with
uplo
 =
CblasLower
, the array
ap
 must contain the lower triangular part of the Hermitian matrix packed sequentially, row-by-row, so that
ap
[0]
 contains
A
1, 1
,
ap
[1]
 and
ap
[2]
 contain
A
2, 1
 and
A
2, 2
 respectively, and so on.
The imaginary parts of the diagonal elements need not be set and are assumed to be zero.
x
Array, size at least
(1 +(
n
 - 1)*abs(
incx
))
. Before entry, the incremented array
x
 must contain the
n
-element vector
x
.
incx
Specifies the increment for the elements of
x
.
The value of
incx
 must not be zero.
beta
Specifies the scalar
beta
.
When
beta
 is equal to zero then
y
 need not be set on input.
y
Array, size at least
(1 + (
n
 - 1)*abs(
incy
))
. Before entry, the incremented array
y
 must contain the
n
-element vector
y
.
incy
Specifies the increment for the elements of
y
.
The value of
incy
 must not be zero.
Output Parameters
y
Overwritten by the updated vector
y
.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804