Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

cblas_?axpyi

Adds a scalar multiple of compressed sparse vector to a full-storage vector.

Syntax

void
cblas_saxpyi
(
const
MKL_INT
nz
,
const
float
a
,
const
float
*x
,
const
MKL_INT
*indx
,
float
*y
);
void
cblas_daxpyi
(
const
MKL_INT
nz
,
const
double
a
,
const
double
*x
,
const
MKL_INT
*indx
,
double
*y
);
void
cblas_caxpyi
(
const
MKL_INT
nz
,
const
void
*a
,
const
void
*x
,
const
MKL_INT
*indx
,
void
*y
);
void
cblas_zaxpyi
(
const
MKL_INT
nz
,
const
void
*a
,
const
void
*x
,
const
MKL_INT
*indx
,
void
*y
);
Include Files
  • mkl.h
Description
The
?axpyi
 routines perform a vector-vector operation defined as 
y := a*x + y
where:
a
 is a scalar,
x
 is a sparse vector stored in compressed form,
y
 is a vector in full storage form.
The
?axpyi
 routines reference or modify only the elements of
y
 whose indices are listed in the array
indx
.
The values in
indx
 must be distinct.
Input Parameters
nz
The number of elements in
x
 and
indx
.
a
Specifies the scalar
a
.
x
Array, size at least
nz
.
indx
Specifies the indices for the elements of
x
.
Array, size at least
nz
.
y
Array, size at least
max(
indx
[i])
.
Output Parameters
y
Contains the updated vector
y
.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804