Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

mkl_cspblas_?csrtrsv

Triangular solvers with simplified interface for a sparse matrix in the CSR format (3-array variation) with zero-based indexing (deprecated).

Syntax

void
mkl_cspblas_scsrtrsv
(
const
char
*uplo
,
const
char
*transa
,
const
char
*diag
,
const
MKL_INT
*m
,
const
float
*a
,
const
MKL_INT
*ia
,
const
MKL_INT
*ja
,
const
float
*x
,
float
*y
);
void
mkl_cspblas_dcsrtrsv
(
const
char
*uplo
,
const
char
*transa
,
const
char
*diag
,
const
MKL_INT
*m
,
const
double
*a
,
const
MKL_INT
*ia
,
const
MKL_INT
*ja
,
const
double
*x
,
double
*y
);
void
mkl_cspblas_ccsrtrsv
(
const
char
*uplo
,
const
char
*transa
,
const
char
*diag
,
const
MKL_INT
*m
,
const
MKL_Complex8
*a
,
const
MKL_INT
*ia
,
const
MKL_INT
*ja
,
const
MKL_Complex8
*x
,
MKL_Complex8
*y
);
void
mkl_cspblas_zcsrtrsv
(
const
char
*uplo
,
const
char
*transa
,
const
char
*diag
,
const
MKL_INT
*m
,
const
MKL_Complex16
*a
,
const
MKL_INT
*ia
,
const
MKL_INT
*ja
,
const
MKL_Complex16
*x
,
MKL_Complex16
*y
);
Include Files
  • mkl.h
Description
This routine is deprecated. Use mkl_sparse_?_trsvfrom the
Intel® oneAPI Math Kernel Library
 Inspector-executor Sparse BLAS interface instead.
The
mkl_cspblas_?csrtrsv
 routine solves a system of linear equations with matrix-vector operations for a sparse matrix stored in the CSR format (3-array variation) with zero-based indexing: 
A*y = x
or 
A
T
*y = x,
where:
x
 and
y
 are vectors,
A
 is a sparse upper or lower triangular matrix with unit or non-unit main diagonal,
A
T
 is the transpose of
A
.
This routine supports only zero-based indexing of the input arrays.
Input Parameters
uplo
Specifies whether the upper or low triangle of the matrix
A
 is used.
If
uplo
 =
'U'
 or
'u'
, then the upper triangle of the matrix
A
 is used.
If
uplo
 =
'L'
 or
'l'
, then the low triangle of the matrix
A
 is used.
transa
Specifies the system of linear equations.
If
transa
 =
'N'
 or
'n'
, then
A
*
y
 =
x
If
transa
 =
'T'
 or
't'
 or
'C'
 or
'c'
, then
A
T
*
y
 =
x
,
diag
Specifies whether matrix
A
 is unit triangular.
If
diag
 =
'U'
 or
'u'
, then
A
 is unit triangular.
If
diag
 =
'N'
 or
'n'
, then
A
 is not unit triangular.
m
Number of rows of the matrix
A
.
a
Array containing non-zero elements of the matrix
A
. Its length is equal to the number of non-zero elements in the matrix
A
. Refer to
values
 array description in Sparse Matrix Storage Formats for more details.
The non-zero elements of the given row of the matrix must be stored in the same order as they appear in the row (from left to right).
No diagonal element can be omitted from a sparse storage if the solver is called with the non-unit indicator.
ia
Array of length
m
+1
, containing indices of elements in the array
a
, such that
ia
[
i
]
 is the index in the array
a
 of the first non-zero element from the row
i
. The value of the last element
ia
[
m
]
 is equal to the number of non-zeros. Refer to
rowIndex
 array description in Sparse Matrix Storage Formats for more details.
ja
Array containing the column indices for each non-zero element of the matrix
A
.
Its length is equal to the length of the array
a
. Refer to
columns
 array description in Sparse Matrix Storage Formats for more details.
Column indices must be sorted in increasing order for each row.
x
Array, size is
m
.
On entry, the array
x
 must contain the vector
x
.
Output Parameters
y
Array, size at least
m
.
Contains the vector
y
.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804