Developer Reference for Intel® oneAPI Math Kernel Library - C

Developer Reference

  • 0.9
  • 09/09/2020
  • Public Content
Contents

mkl_?dnscsr

Convert a sparse matrix in uncompressed representation to the CSR format and vice versa (deprecated).

Syntax

void
mkl_ddnscsr
(
const
MKL_INT
*job
,
const
MKL_INT
*m
,
const
MKL_INT
*n
,
double
*adns
,
const
MKL_INT
*lda
,
double
*acsr
,
MKL_INT
*ja
,
MKL_INT
*ia
,
MKL_INT
*info
);
void
mkl_sdnscsr
(
const
MKL_INT
*job
,
const
MKL_INT
*m
,
const
MKL_INT
*n
,
float
*adns
,
const
MKL_INT
*lda
,
float
*acsr
,
MKL_INT
*ja
,
MKL_INT
*ia
,
MKL_INT
*info
);
void
mkl_cdnscsr
(
const
MKL_INT
*job
,
const
MKL_INT
*m
,
const
MKL_INT
*n
,
MKL_Complex8
*adns
,
const
MKL_INT
*lda
,
MKL_Complex8
*acsr
,
MKL_INT
*ja
,
MKL_INT
*ia
,
MKL_INT
*info
);
void
mkl_zdnscsr
(
const
MKL_INT
*job
,
const
MKL_INT
*m
,
const
MKL_INT
*n
,
MKL_Complex16
*adns
,
const
MKL_INT
*lda
,
MKL_Complex16
*acsr
,
MKL_INT
*ja
,
MKL_INT
*ia
,
MKL_INT
*info
);
Include Files
  • mkl.h
Description
This routine is deprecated. Use the matrix manipulation routinesfrom the
Intel® oneAPI Math Kernel Library
 Inspector-executor Sparse BLAS interface instead.
This routine converts a sparse matrix
A
 between formats: stored as a rectangular array (dense representation) and stored using compressed sparse row (CSR) format (3-array variation).
Input Parameters
job
Array, contains the following conversion parameters:
  • job
    [0]
    : Conversion type.
    • If
      job
      [0]
      =0
      , the rectangular matrix
      A
       is converted to the CSR format;
    • if
      job
      [0]
      =1
      , the rectangular matrix
      A
       is restored from the CSR format.
  • job
    [1]
    : index base for the rectangular matrix
    A
    .
    • If
      job
      [1]
      =0
      , zero-based indexing for the rectangular matrix
      A
       is used;
    • if
      job
      [1]
      =1
      , one-based indexing for the rectangular matrix
      A
       is used.
  • job
    [2]
    : Index base for the matrix in CSR format.
    • If
      job
      [2]
      =0
      , zero-based indexing for the matrix in CSR format is used;
    • if
      job
      [2]
      =1
      , one-based indexing for the matrix in CSR format is used.
  • job
    [3]
    : Portion of matrix.
    • If
      job
      [3]
      =0
      ,
      adns
       is a lower triangular part of matrix
      A
      ;
    • If
      job
      [3]
      =1
      ,
      adns
       is an upper triangular part of matrix
      A
      ;
    • If
      job
      [3]
      =2
      ,
      adns
       is a whole matrix
      A
      .
  • job
    [4]
    =
    nzmax
    : maximum number of the non-zero elements allowed if
    job
    [0]
    =0
    .
  • job
    [5]
    : job indicator for conversion to CSR format.
    • If
      job
      [5]
      =0
      , only array
      ia
       is generated for the output storage.
    • If
      job
      [5]
      >0
      , arrays
      acsr
      ,
      ia
      ,
      ja
       are generated for the output storage.
m
Number of rows of the matrix
A
.
n
Number of columns of the matrix
A
.
adns
(input/output)
If the conversion type is from uncompressed to CSR, on input
adns
 contains an uncompressed (dense) representation of matrix
A
.
lda
Specifies the leading dimension of
adns
 as declared in the calling (sub)program.
For zero-based indexing of
A
,
lda
 must be at least
max(1,
n
)
.
For one-based indexing of
A
,
lda
 must be at least
max(1,
m
)
.
acsr
(input/output)
If conversion type is from CSR to uncompressed, on input
acsr
 contains the non-zero elements of the matrix
A
. Its length is equal to the number of non-zero elements in the matrix
A
. Refer to
values
 array description in Sparse Matrix Storage Formats for more details.
ja
(input/output). If conversion type is from CSR to uncompressed, on input
for zero-based indexing of
A
ja
 contains the column indices
plus one
 for each non-zero element of the matrix
A
.
For one-based indexing of
A
ja
 contains the column indices for each non-zero element of the matrix
A
.
Its length is equal to the length of the array
acsr
. Refer to
columns
 array description in Sparse Matrix Storage Formats for more details.
ia
(input/output). Array of length
m
 + 1
.
If conversion type is from CSR to uncompressed, on input
for zero-based indexing of
A
ia
 contains indices of elements in the array
acsr
, such that
ia
[
i
] - 1
 is the index in the array
acsr
 of the first non-zero element from the row
i
.
For one-based indexing of
A
ia
 contains indices of elements in the array
acsr
, such that
ia
[
i
]
 is the index in the array
acsr
 of the first non-zero element from the row
i
.
The value of
ia
[
m
] -
ia
[0]
 is equal to the number of non-zeros. Refer to
rowIndex
 array description in Sparse Matrix Storage Formats for more details.
Output Parameters
adns
If conversion type is from CSR to uncompressed, on output
adns
 contains the uncompressed (dense) representation of matrix
A
.
acsr
,
ja
,
ia
If conversion type is from uncompressed to CSR, on output
acsr
,
ja
, and
ia
 contain the compressed sparse row (CSR) format (3-array variation) of matrix
A
 (see Sparse Matrix Storage Formats for a description of the storage format).
info
Integer info indicator only for restoring the matrix
A
 from the CSR format.
If
info
=0
, the execution is successful.
If
info
=
i
, the routine is interrupted processing the
i
-th row because there is no space in the arrays
acsr
 and
ja
 according to the value
nzmax
.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804